Channel3 ESP32 Port

ESP32 port of the Channel3 analog NTSC/PAL television broadcast firmware.

Overview

This project ports the ESP8266 Channel3 firmware to ESP32, maintaining the ability to broadcast RF signals on Channel 3 (61.25 MHz) directly from a GPIO pin.

WARNING: RF broadcast without proper licensing may be illegal in your jurisdiction. This project is for educational purposes only.

How It Works

The ESP32 outputs an 80 MHz bitstream via I2S DMA. Pre-computed waveform patterns create harmonics at the Channel 3 carrier frequency (61.25 MHz for luma). The GPIO pin acts as an antenna, radiating RF directly.

Key Differences from ESP8266 Version

Component	ESP8266	ESP32
Clock source	160 MHz / 2	160 MHz / 2 (PLL_D2)
DMA	SLC (sdio_queue)	GDMA (lldesc_t)
I2S mode	Standard I2S	LCD/parallel mode
ISR attach	ets_isr_attach()	esp_intr_alloc()
Framework	ESP8266 RTOS SDK	ESP-IDF 5.x

Building

Prerequisites

• ESP-IDF 5.x installed and configured
• ESP32 development board (original ESP32, not ESP32-S2/S3/C3)

Build Commands

# Set up ESP-IDF environment
. $IDF_PATH/export.sh

# Configure the project (optional - to change settings)
idf.py menuconfig

# Build
idf.py build

# Flash
idf.py -p /dev/ttyUSB0 flash

# Monitor
idf.py -p /dev/ttyUSB0 monitor

Configuration

Use idf.py menuconfig to access settings under "Channel3 Configuration":

• Video Standard: NTSC (default) or PAL
• I2S Data Output GPIO: GPIO pin for RF output (default: GPIO22)
• WiFi SoftAP SSID: Access point name (default: "Channel3")
• WiFi SoftAP Password: Access point password

Hardware Setup

1. Connect a short wire (antenna) to the configured GPIO pin (default GPIO22)
2. Tune an analog TV to Channel 3
3. The ESP32 will broadcast directly - no external components needed

Note: The RF output is very low power. The antenna must be very close to the TV antenna for reception.

Project Structure

esp32_channel3/
├── CMakeLists.txt              # Main project CMake file
├── sdkconfig.defaults          # Default SDK configuration
├── main/
│   ├── CMakeLists.txt          # Main component build file
│   ├── Kconfig.projbuild       # Configuration options
│   ├── video_broadcast.c       # I2S DMA video generation (ESP32)
│   ├── video_broadcast.h       # Video broadcast header
│   ├── 3d.c                    # Fixed-point 3D graphics engine
│   ├── 3d.h                    # 3D graphics header
│   └── user_main.c             # Application entry & demo screens
└── components/
    └── tablemaker/
        ├── CMakeLists.txt      # Component build file
        ├── broadcast_tables.c  # Premodulated RF waveforms
        ├── broadcast_tables.h  # Table definitions
        ├── CbTable.c           # NTSC/PAL line type lookup
        └── CbTable.h           # Line type definitions

Technical Notes

I2S LCD Mode

The ESP32 I2S peripheral is configured in LCD mode for parallel output. This allows continuous DMA output at high bitrates without the overhead of standard I2S framing.

Clock Configuration

The target is 80 MHz output to match the original ESP8266 implementation:

• ESP32 PLL_D2 clock: 160 MHz
• Divider: 2
• Output: 80 MHz

DMA Operation

DMA descriptors are configured in a circular buffer. The ISR is called on each buffer completion (EOF), filling the buffer with the next line's premodulated data.

Known Limitations

1. RF Quality: ESP32 GPIO slew rate and output characteristics differ from ESP8266. RF quality may vary.
2. Timing Sensitivity: Video signal generation is timing-critical. Heavy system load may cause visible artifacts.
3. Legal Restrictions: Unlicensed RF transmission is illegal in most jurisdictions.

Credits

Original ESP8266 Channel3: Charles Lohr (CNLohr) ESP32 Port: Based on original architecture

License

See LICENSE file in the parent directory.