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70 lines
1.8 KiB
70 lines
1.8 KiB
/**
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* @file video_broadcast.h
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* @brief ESP32 Video Broadcast - RF modulation via I2S DMA
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*
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* This module generates analog NTSC/PAL television signals by outputting
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* an 80 MHz bitstream through I2S DMA. The GPIO pin acts as an antenna,
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* radiating RF directly on Channel 3 (61.25 MHz).
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*
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* Original ESP8266 version: Copyright 2015 <>< Charles Lohr
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* ESP32 Port 2024
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*/
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#ifndef VIDEO_BROADCAST_H
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#define VIDEO_BROADCAST_H
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#include <stdint.h>
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#include "sdkconfig.h"
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// Framebuffer dimensions
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// FBW is "double-pixels" for double-resolution monochrome width
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#define FBW 232
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#define FBW2 (FBW / 2) // Actual width in true pixels
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#ifdef CONFIG_VIDEO_PAL
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#define FBH 264
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#else
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#define FBH 220
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#endif
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// DMA buffer configuration
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#define DMABUFFERDEPTH 3
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// Global variables
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extern int gframe; // Current frame number
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extern uint16_t framebuffer[((FBW2/4)*(FBH))*2]; // Double-buffered framebuffer
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extern uint32_t last_internal_frametime; // Last frame rendering time
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extern int8_t jam_color; // Color jam for RF testing (-1 = disabled)
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/**
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* @brief Initialize the I2S DMA video broadcast system
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*
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* Sets up:
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* - APLL clock for 80 MHz output
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* - I2S in LCD/parallel mode
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* - DMA descriptors in circular buffer configuration
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* - ISR for line-by-line rendering
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* - GPIO routing for RF output
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*/
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void video_broadcast_init(void);
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/**
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* @brief Stop video broadcast
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*
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* Disables I2S output and releases resources
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*/
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void video_broadcast_stop(void);
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/**
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* @brief Temporarily pause video broadcast for flash operations
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*
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* Disables the I2S interrupt to prevent cache conflicts during NVS writes
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*/
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void video_broadcast_pause(void);
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/**
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* @brief Resume video broadcast after pause
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*/
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void video_broadcast_resume(void);
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#endif // VIDEO_BROADCAST_H
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