/**
 * @file video_broadcast.h
 * @brief ESP32 Video Broadcast - RF modulation via I2S DMA
 *
 * This module generates analog NTSC/PAL television signals by outputting
 * an 80 MHz bitstream through I2S DMA. The GPIO pin acts as an antenna,
 * radiating RF directly on Channel 3 (61.25 MHz).
 *
 * Original ESP8266 version: Copyright 2015 <>< Charles Lohr
 * ESP32 Port 2024
 */

#ifndef VIDEO_BROADCAST_H
#define VIDEO_BROADCAST_H

#include <stdint.h>
#include "sdkconfig.h"

// Framebuffer dimensions
// FBW is "double-pixels" for double-resolution monochrome width
#define FBW 232
#define FBW2 (FBW / 2)  // Actual width in true pixels

#ifdef CONFIG_VIDEO_PAL
    #define FBH 264
#else
    #define FBH 220
#endif

// DMA buffer configuration
#define DMABUFFERDEPTH 3

// Global variables
extern int gframe;                              // Current frame number
extern uint16_t framebuffer[((FBW2/4)*(FBH))*2]; // Double-buffered framebuffer
extern uint32_t last_internal_frametime;        // Last frame rendering time
extern int8_t jam_color;                        // Color jam for RF testing (-1 = disabled)

/**
 * @brief Initialize the I2S DMA video broadcast system
 *
 * Sets up:
 * - APLL clock for 80 MHz output
 * - I2S in LCD/parallel mode
 * - DMA descriptors in circular buffer configuration
 * - ISR for line-by-line rendering
 * - GPIO routing for RF output
 */
void video_broadcast_init(void);

/**
 * @brief Stop video broadcast
 *
 * Disables I2S output and releases resources
 */
void video_broadcast_stop(void);

/**
 * @brief Temporarily pause video broadcast for flash operations
 *
 * Disables the I2S interrupt to prevent cache conflicts during NVS writes
 */
void video_broadcast_pause(void);

/**
 * @brief Resume video broadcast after pause
 */
void video_broadcast_resume(void);

#endif // VIDEO_BROADCAST_H