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pyNgSpice/examples/xspice

History

Holger Vogt b8357edddc Add analog code model astate. It reports the previous state (delayed by 1 to 3 time steps) of the input node. Single or differential voltage or current.		6 months ago
..
d_lut	fix bug no 819, which has been introduced by	5 months ago
d_process	Fix d_process named pipes example. Use the correct gtkwave command for MacOS.	10 months ago
d_source	Obtain memory and simulation time	4 years ago
delay	fix bug no 819, which has been introduced by	5 months ago
delta-sigma	add y-axis label	4 years ago
filesource	Add missing value in the last line.	7 months ago
ghdl	Add co-simulation with VHDL, using the GHDL compiler and d_cosim.	10 months ago
icarus_verilog	Fix ordering of parameter definition and use.	10 months ago
original-examples	fix bug no 819, which has been introduced by	5 months ago
pll	Re-make pll-xspice.cir as a wrapper around shared-pll-xspice.cir,	10 months ago
pwm-osc	Examples for d_pwm and d_osc	3 years ago
see	fix bug no 819, which has been introduced by	5 months ago
state	fix bug no 819, which has been introduced by	5 months ago
table	fix bug no 819, which has been introduced by	5 months ago
transmission_lines	Fix the xspice transmission_line examples.	8 months ago
various	Add analog code model astate.	6 months ago
verilator	Fix ordering of parameter definition and use.	10 months ago