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418 Commits (9edf34495e8ff2ea25e7017947068fd4b2a3281c)

Author	SHA1	Message	Date
Holger Vogt	f2247a3c6f	Use sparse, as KLU will fail.	3 years ago
Holger Vogt	716bb0a6bc	Add plot for inverter gain	3 years ago
Holger Vogt	161ace44da	Restore the original model parameters. Add information on its source.	3 years ago
Francesco Lannutti	b08eb2266a	Added initial KLU support for node collapsing	3 years ago
Francesco Lannutti	bb90374402	Added missing ISCAS85 libraries	6 years ago
Francesco Lannutti	ba4e530ec0	KLU Integration from scratch #1, examples/klu/Circuits	12 years ago
Holger Vogt	f60766a1fa	Transformer examples, (three different methods) Single primary and secondary windings More to come (multiple ports, core saturation)	3 years ago
dwarning	4f22726c87	better low Ic range covering	3 years ago
dwarning	5704790cc2	no need for extra run	3 years ago
Holger Vogt	8bd3c87be1	better visibility	3 years ago
Giles Atkinson	5fe236290f	Add example of reading S-parameters from a Touchstone file.	3 years ago
Giles Atkinson	f632da5f7f	Add a comment to say that LT/PSPICE compatability is needed.	3 years ago
Brian Taylor	68f1015075	Example for 7490a Pspice subckt. This exercises jkff, logicexp, and pindly conversions to XSPICE.	3 years ago
Giles Atkinson	576f218945	Fix the NAND and NOR variants of XSPICE code model multi_input_pwl and add an example of its use with the E-source NAND variant.	3 years ago
Brian Taylor	51b361bbf0	When Cider models are present, a normal batch mode sp_shutdown (for example, ngspice -b cmosinv.cir) will call com_quit(NULL). This cleans up so that valgrind will find no leaks in Cider devices after sp_shutdown. To disable this feature, set the environment variable CIDER_COM_QUIT="OFF". Even though it really does not matter that Cider memory is cleared just before exit, it makes it cleaner for valgrind checks.	3 years ago
Giles Atkinson	5114d6c2f4	Add an option to the iplot command: -d sets the number of simulation steps before the window is shown. The value can be chosen to limit rapid resizing when starting and that is used in the PLL examples.	3 years ago
Giles Atkinson	d31568bd83	Add parsing and translation of the FREQ form of E-source devices, integrated with the existing parsing of AND/NAND/OR/NOR forms (inpcom.c). For the implementation, add a new analog XSPICE code model, xfer. Add an example to examples/sp.	3 years ago
Holger Vogt	585f13bd4a	Better visibility of the results	3 years ago
Holger Vogt	c7bb12d9d0	More info	3 years ago
Holger Vogt	5c8af9770b	Add rusage to measure simulation time.	3 years ago
Holger Vogt	2685df1b05	Add vto model parameter (the default has changed!), add .ic to ease op and immediately start oscillation.	3 years ago
Holger Vogt	a48cc44c7f	Example input file for 'iplot -w' option	3 years ago
dwarning	a48b36ffc5	more realistic self-heating example	3 years ago
Brian Taylor	14a403e193	Use ~ on the input of a tristate buffer for INV3, and avoid creating an extra inverter. For ff/latch use ~ on set/reset and jkff clock inputs to avoid creating extra inverters.	3 years ago
Holger Vogt	33e17fa969	noise simulation examples	3 years ago
Giles Atkinson	7f4eb1c7d8	Add examples of controlling auto-bridge behaviour with the "vcc" and "family" parameters.	3 years ago
Holger Vogt	6213145c94	.control section: atanh examples	3 years ago
Holger Vogt	c2fb32f98a	really run a dc simulation	3 years ago
Holger Vogt	d36c4b8772	Remove bulk simulation netlist from files needing a .control section.	3 years ago
Holger Vogt	8c98b70e45	Add input file dedicated to batch mode, to be run with ngspice -b -r inv.out bsimbulk_inverter_bach.sp	3 years ago
Holger Vogt	512bcf6095	Remove unused folder	3 years ago
Holger Vogt	dbdbcf95c2	BSIMBULK example with locally adding osdi models by using the 'pre_osdi' command in a .control section	3 years ago
Holger Vogt	b9eef23eed	Update the example structure for OSDI/OpenVAF: all compiled models into lib/ngspice spinit updated to load the models via command 'osdi' local calls with 'pre_osdi' commanted out.	3 years ago
Holger Vogt	5bd45eeb87	The Roessler Attractor examples has been provided by Giles Atkinson, of course	3 years ago
Holger Vogt	16c7c407d4	Nice looking Roessler Attractor provided by A. Gillespie	3 years ago
Holger Vogt	cb5f9e9bdc	MOS example files updated and moved to its own directory	3 years ago
Holger Vogt	af9f25e985	Various filter examples using Laplace expression x_fer	3 years ago
Giles Atkinson	bf580abf69	Add a simple example of using string-valued parameters.	3 years ago
Holger Vogt	01c211339c	Rename example file	3 years ago
Brian Taylor	4936fa2b1d	Add serial load to 74f524 example.	3 years ago
dwarning	0cae4f0b6c	special ngbehavior needed	3 years ago
Brian Taylor	c7fd3bcaee	Add example for 74f524.	3 years ago
Holger Vogt	4bcd4daf55	Rename projetc to OR (OR-gate) Add new path (absolute, so has to be modified by any user)	3 years ago
Holger Vogt	b639ebae44	Rename examples for ECL OR gate Simulate OR gate faster TSTEP 0.1n -> 0.3n	3 years ago
Holger Vogt	3e27e640b5	Missing renaming: osdi_win --> osdi_libs	3 years ago
Holger Vogt	4f73f18f6d	Remove	3 years ago
Holger Vogt	69660ad387	Move adder_common.inc to be available for all test files.	3 years ago
Holger Vogt	bb9469a03a	Rename test_osdi_libs to osdi_libs	3 years ago
Holger Vogt	96608abbe2	Update with Semimod download page	3 years ago
Holger Vogt	157200aa86	Rename test_osdi_win to test_osdi_libs	3 years ago