Fix the xspice transmission_line examples.

Also, cherry pick:
commit 87d09def9c (origin/bt_dev)
Author: Brian Taylor <lbwnet@comcast.net>
Date:   Sun May 18 14:01:47 2025 -0700

    Fix memory leak in xspice oneshot.

examples/xspice/transmission_lines/cpline_ac.cir

@@ -5,7 +5,7 @@ V2 p2 0 dc 0 ac 1 portnum 2 z0 50
 V3 p3 0 dc 0 ac 1 portnum 3 z0 50
 V4 p4 0 dc 0 ac 1 portnum 4 z0 50
 
-A1 %hd(p1 0) %hd(p2 0) %hd(p3 0) %hd(p4 0) CPLINE1
+A1 %hd(p1 0) %hd(p2 0) %hd(p3 0) %hd(p4 0) %vd(p1 0) %vd(p2 0) %vd(p3 0) %vd(p4 0) CPLINE1
 .MODEL CPLINE1 CPLINE(ze=84.48 zo=53.99 l=25e-3 ere=3.34 ero=2.829 ao=0 ae=0)
 
 .control

examples/xspice/transmission_lines/cpmline_ac.cir

@@ -6,7 +6,7 @@ V3 p3 0 dc 0 ac 1 portnum 3 z0 50
 V4 p4 0 dc 0 ac 1 portnum 4 z0 50
 
 A1 %hd(p1 0) %hd(p2 0) %hd(p3 0) %hd(p4 0) %vd(p1 0) %vd(p2 0) %vd(p3 0) %vd(p4 0) CPMLIN1
-.MODEL CPMLIN1 CPMLIN(w=1e-3 l=20e-3 s=0.3e-3 er=9.8 h=1e-3 t=35e-6 tand=1e-3 rho=0.022e-6 d1=0.15e-6 model=0 disp=0)
+.MODEL CPMLIN1 CPMLIN(w=1e-3 l=20e-3 s=0.3e-3 er=9.8 h=1e-3 t=35e-6 tand=1e-3 rho=0.022e-6 d=0.15e-6 model=0 disp=0)
 
 .control
 

examples/xspice/transmission_lines/mlin_tran.cir

@@ -8,7 +8,7 @@ R2 in 1 1m
 *R3 in ins 1e12
 *R4 out outs 1e12
 A1 %hd(in 0) %hd(out 0) %vd(in 0) %vd(out 0) MLIN1
-.MODEL MLIN1 MLIN(w=1e-3 l=50e-3 er=9.8 h=1e-3 t=35e-6 tand=1e-3 rho=0.022e-6 d1=0.15e-6 model=0 disp=0 tranmodel=1)
+.MODEL MLIN1 MLIN(w=1e-3 l=50e-3 er=9.8 h=1e-3 t=35e-6 tand=1e-3 rho=0.022e-6 d=0.15e-6 model=0 disp=0 tranmodel=1)
 *A1 %hd(in 0) %hd(out 0) %vd(in 0) %vd(out 0) TLIN1
 *.MODEL TLIN1 TLINE(l=100e-3 z=50.0 a=0.0)