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Fix typo in vlnggen error message.

pre-master-46
Giles Atkinson 11 months ago
committed by Holger Vogt
parent
commit
9429a27af0
  1. 2
      src/xspice/verilog/vlnggen

2
src/xspice/verilog/vlnggen

@ -342,7 +342,7 @@ else
if $fh > 0
fclose $fh
else
echo Can not find bulid file $msvcfile
echo Can not find build file $msvcfile
quit
end

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