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pyNgSpice/examples/xspice

History

Holger Vogt afde37c35d add y-axis label		4 years ago
..
d_lut	Obtain memory and simulation time	4 years ago
d_source	Obtain memory and simulation time	4 years ago
delay	Obtain memory and simulation time	4 years ago
delta-sigma	add y-axis label	4 years ago
filesource	Obtain memory and simulation time	4 years ago
original-examples	New names for the (experimental) ramp-time capacitor and inductor code models	4 years ago
pll	make simulation faster, allow batch mode	6 years ago
state	Obtain memory and simulation time	4 years ago
table	one tran analysis is sufficient	8 years ago
analog_models1_transient.sp	xspice examples	16 years ago
fstest.sp	'filesource' test	15 years ago
sine.m	'filesource' test	15 years ago
xspice_c1.cir	example input file as cited in manual	14 years ago
xspice_c2.cir	whitespace cleanup, add missing trailing newlines	16 years ago
xspice_c3.cir	whitespace cleanup, add missing trailing newlines	16 years ago