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pyNgSpice/test_cases

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Pascal Kuthe acfaf023b3 prototype for Verilog-A integration using OSDI and OpenVAF This initial prototype is capable of performing DC, transient and AC analysis. Not all features of OSDI are supported yet and there are still some open questions regarding ngspice integration. However many usecase already work very well and a large amount of CMC models are supported. The biggest missing feature right now is noise analysis. test: test case for diode DC working with SH test: add transient analysis to osdi_diode test test: added docu text to osdi_diode test test: added test case directories fix: bug in osdi_load test: small change to netlist fix: implement DEVunsetup fix: correct behaviour for MODEINITSMSIG test: osdi diode enable all analysis modes removed netlist ignoring test results added the build of the diode shared object to the python test script deleting old stuff and always rebuilding the shared object added diode_va.c to the repo preparing CI Create .gitlab-ci.yml file (testing) add res, cap and multiple devices test feat: use osdi command to load files Previously OSDI shared object files were loaded from fixed directories. This was unreliable, inconvenient and caused conflicts with XSPICE. This commit remove the old loading mechanism and instead introduces the `osdi` command that can load (a list of) osdi object files (like the codemodel command for XSPICE). A typical usecase will use this as a precommand in the netlist: .control pre_osdi foo.osdi .endc If the specified file is a relative path it is first resolved relative to the parent directory of the netlist. If the osdi command is invoked from the interactive prompt the file is resolved relative to the current working directory instead. This commit also moves osdi from the devices folder to the root src folder like xspice. This better reflects the role of the code as users may otherthwise (mistakenly) assume that osdi is just another handwritten model. test: update tests to new command fix: do not ignore first parameter feat: implement log message callback fix: don't generate ddt matrix/rhs in DC sweep fix: missing linker script update to osdi 0.3 (testing) simplify test cases, fix bug (testing) multiple devices test improvement (testig) node collapsing bugfix test: increase tolerance in tests feat: update to newest OSDI header fix: temperature update dt behaviour fix: ignored models fix: compilation script fix: allow hicum/l2 to compile with older c++ compilers fix: set required compiler flags for osdi fix: disable x by default fix: add missing SPICE functions fix: update diode to latest ngspice version feat: implement python CMC test runner doc: Add README_OSDI.md fix: make testing script work with python version before 3.9 fix: free of undefined local variable fix: do not calculate time derivative during tran op update osdi version fixes for compilation on windows		4 years ago
..
capacitor	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
cccs	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
ccvs	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
diode	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
hicuml2	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
inductor	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
multiple_devices	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
node_collapsing	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
resistor	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
vccs	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
vcvs	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
testing.py	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago