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pyNgSpice/tests/bsimsoi

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Holger Vogt f073fb5c05 Consecutive tran and ac simulation may lead to gross errors when TC or scale is used on the instance line of C and L. Reason is the missing reset when CKTtemp is called once during each simulation command. TC or scale is then applied again and again, a reset is missing. This patch adds a reset, i.e. the capacitance or inductance is reset to its instance value in a call to *temp. It fixes bug#594. Command 'alter' has been tested. Resistance has not been tackled by this bug, because the line here->RESconduct = here->RESm / (here->RESresist * factor * here->RESscale); differs from here->CAPcapac = here->CAPcapac * factor * here->CAPscale; in that there is no accumulation of correction factors with here->RESconduct		4 years ago
..
nmos	model qa check for other simulator	11 years ago
pmos	model qa check for other simulator	11 years ago
Makefile.am	rename "bsim3soi" device to "bsimsoi"	14 years ago