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pyNgSpice/test_cases

History

Holger Vogt d96bb56d3a Linear area transfer curves		3 years ago
..
ECL	Linear area transfer curves	3 years ago
capacitor	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
cccs	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
ccvs	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
diode	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
diode_mod	New and updated test cases	3 years ago
hicuml0	New and updated test cases	3 years ago
hicuml2	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
inductor	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
multiple_devices	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
node_collapsing	Linear area transfer curves	3 years ago
resistor	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
test-bsimbulk	device name now starts with N (instead of A).	3 years ago
test-bsimcmg	BSIMCMG preliminary test cases	3 years ago
test-psp102	(non-working) PSP102 examples	3 years ago
test-psp103	Linear area transfer curves	3 years ago
vccs	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
vcvs	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago
testing.py	prototype for Verilog-A integration using OSDI and OpenVAF	3 years ago