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pyNgSpice/examples/cider/mos

History

dwarning cf88f14383 The MEXTRAM Bipolar Model level 504 in Verilog-A (Original Version 504.6)		20 years ago
..
bootinv.cir	Added some examples.	22 years ago
charge.cir	Added some examples.	22 years ago
cmosinv.cir	Added some examples.	22 years ago
nmosinv.cir	Added some examples.	22 years ago
pass.cir	Added some examples.	22 years ago
ringosc.cir	Added some examples.	22 years ago