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Brian Taylor a6b2773c90 For a ugate timing model, when tphlXX/tplhXX is not found, set the fall/rise delay to zero (1.0e-12). 3 years ago
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nmos4p0.mod new examples: inverters and ring oscillator using SOI 7 years ago
pmos4p0.mod new examples: inverters and ring oscillator using SOI 7 years ago