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7002 Commits
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36 MiB
C 90.4%
C++ 3.2%
AMPL 2.4%
M4 1.4%
Perl 0.4%
Other 1.8%
 
 
 
 
 
 
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pyNgSpice/examples/pss
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dwarning 17497eddec
VDMOS change thermal left and rigth side signs that mos and diode part follow same logic
6 years ago
..
colpitt_osc_pss.cir next version of PSS2 13 years ago
compl_cross_quad_osc_pss.cir move to the actual bsim4 version to avoid needless warnings 12 years ago
hartley_osc_pss.cir next version of PSS2 13 years ago
ring_osc_pss.cir move to the actual bsim4 version to avoid needless warnings 12 years ago
vackar_osc_pss.cir next version of PSS2 13 years ago
vdp_osc_pss.cir next version of PSS2 13 years ago
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