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36 lines
702 B
36 lines
702 B
*Sample netlist for BSIM-CMG
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* (exec-spice "ngspice %s" t)
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*Inverter Transient
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.include Modelcards/modelcard.nmos
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.include Modelcards/modelcard.pmos
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* --- Voltage Sources ---
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vdd supply 0 dc=1.0
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vsig vi 0 dc=0.5 sin (0.5 0.5 1MEG)
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* --- Inverter Subcircuit ---
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.subckt mg_inv vin vout vdd gnd
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NP1 vout vin vdd vdd BSIMCMG_osdi_P
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NN1 vout vin gnd gnd BSIMCMG_osdi_N
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.ends
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* --- Inverter ---
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Xinv1 vi 1 supply 0 mg_inv
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Xinv2 1 2 supply 0 mg_inv
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Xinv3 2 3 supply 0 mg_inv
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Xinv4 3 4 supply 0 mg_inv
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Xinv5 4 vo supply 0 mg_inv
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* --- Transient Analysis ---
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.tran 20n 5u
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.print tran v(vi) v(vo)
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.control
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pre_osdi test_osdi_libs/bsimcmg.osdi
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set xbrushwidth=3
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run
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plot v(vi) v(vo)
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.endc
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.end
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