Tree: fcb5b12364

pre-master-46

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Commit Graph

8 Commits (fcb5b12364215f70dc5bbf31fc17af9be1a33c73)

Author	SHA1	Message	Date
h_vogt	5d0c3182d3	add BSIM3 model parameters for loop filer with transistor charge pump	14 years ago
dwarning	96dd397251	correct the plot output	14 years ago
h_vogt	19a67fb7c5	pll: just include one of the two vco available (avoid a bug which has been removed only recently)	14 years ago
h_vogt	a0db6f0ccd	update to XSPICE phase-locked loop example	14 years ago
h_vogt	6cd13e0475	pll-xspice-fstep.cir: pll with ref frequency steps	14 years ago
h_vogt	c31fc334f6	pll-xspice.cir: save command added	14 years ago
h_vogt	c0b5a78097	new XSPICE example: use trtol=1 less ripple, but longer simulation time	14 years ago
h_vogt	85ece25a3a	new XSPICE example: mixed mode pll circuit	14 years ago