4 Commits (72d7bb9c8a2e90d79e3f7f3e3cd49865e03afbd9)

Author SHA1 Message Date
dwarning 96dd397251 correct the plot output 14 years ago
h_vogt 19a67fb7c5 pll: just include one of the two vco available 14 years ago
h_vogt a0db6f0ccd update to XSPICE phase-locked loop example 14 years ago
h_vogt 85ece25a3a new XSPICE example: mixed mode pll circuit 14 years ago