Tree: 3d7dbc0124

pre-master-46

Branches Tags

${ item.name }

Create tag ${ searchTerm }

Create branch ${ searchTerm }

from '3d7dbc0124'

${ noResults }

Commit Graph

6 Commits (3d7dbc0124e41c5a4da7cccc3823f9fe9d498dcd)

Author	SHA1	Message	Date
Brian Taylor	68f1015075	Example for 7490a Pspice subckt. This exercises jkff, logicexp, and pindly conversions to XSPICE.	3 years ago
Brian Taylor	14a403e193	Use ~ on the input of a tristate buffer for INV3, and avoid creating an extra inverter. For ff/latch use ~ on set/reset and jkff clock inputs to avoid creating extra inverters.	3 years ago
Brian Taylor	4936fa2b1d	Add serial load to 74f524 example.	3 years ago
Brian Taylor	c7fd3bcaee	Add example for 74f524.	3 years ago
Brian Taylor	7ff8f3773f	Handle cases where logicexp has a timing model but no pindly. This is rare, only 22 tests from the digital libraries. Move digital examples, add missing .spiceint file.	3 years ago
Holger Vogt	5324319edb	Move digital examples to new locations	3 years ago