4 Commits (08a2f04e8db0aaa4d8dbffc1d33978abd60e64ad)

Author SHA1 Message Date
dwarning 96dd397251 correct the plot output 14 years ago
h_vogt 19a67fb7c5 pll: just include one of the two vco available 14 years ago
h_vogt a0db6f0ccd update to XSPICE phase-locked loop example 14 years ago
h_vogt 85ece25a3a new XSPICE example: mixed mode pll circuit 14 years ago