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Fix gcc warnings.

pre-master-46
Giles Atkinson 2 years ago
committed by Holger Vogt
parent
35968d1da6
commit
f4c7202130
4 changed files with 32 additions and 31 deletions
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  1. 4
      src/include/ngspice/cosim.h
  2. 25
      src/xspice/icm/digital/d_cosim/cfunc.mod
  3. 23
      src/xspice/verilog/icarus_shim.c
  4. 11
      src/xspice/verilog/vpi.c

4
src/include/ngspice/cosim.h
View File

@ -69,8 +69,8 @@ struct co_info {
* are taken from parameters in the .model card. * are taken from parameters in the .model card.
*/ */
int lib_argc;
int sim_argc;
unsigned int lib_argc;
unsigned int sim_argc;
const char * const * const lib_argv; const char * const * const lib_argv;
const char * const * const sim_argv; const char * const * const sim_argv;

25
src/xspice/icm/digital/d_cosim/cfunc.mod
View File

@ -169,7 +169,8 @@ static void *cosim_dlopen(const char *fn)
* Out-of-range values for bit_num must be ignored. * Out-of-range values for bit_num must be ignored.
*/ */
void accept_output(struct co_info *pinfo, unsigned int bit_num, Digital_t *val)
static void accept_output(struct co_info *pinfo,
unsigned int bit_num, Digital_t *val)
{ {
struct instance *ip = (struct instance *)pinfo; // First member. struct instance *ip = (struct instance *)pinfo; // First member.
Digital_t *out_vals; // XSPICE rotating memory. Digital_t *out_vals; // XSPICE rotating memory.
@ -448,14 +449,14 @@ void ucm_d_cosim(ARGS)
/* Initialise outputs. Done early in case of failure. */ /* Initialise outputs. Done early in case of failure. */
outs = PORT_NULL(d_out) ? 0 : PORT_SIZE(d_out);
outs = PORT_NULL(d_out) ? 0 : (unsigned int)PORT_SIZE(d_out);
for (i = 0; i < outs; ++i) { for (i = 0; i < outs; ++i) {
OUTPUT_STATE(d_out[i]) = ZERO; OUTPUT_STATE(d_out[i]) = ZERO;
OUTPUT_STRENGTH(d_out[i]) = STRONG; OUTPUT_STRENGTH(d_out[i]) = STRONG;
OUTPUT_DELAY(d_out[i]) = PARAM(delay); OUTPUT_DELAY(d_out[i]) = PARAM(delay);
} }
inouts = PORT_NULL(d_inout) ? 0 : PORT_SIZE(d_inout);
inouts = PORT_NULL(d_inout) ? 0 : (unsigned int)PORT_SIZE(d_inout);
for (i = 0; i < inouts; ++i) { for (i = 0; i < inouts; ++i) {
OUTPUT_STATE(d_inout[i]) = ZERO; OUTPUT_STATE(d_inout[i]) = ZERO;
OUTPUT_STRENGTH(d_inout[i]) = STRONG; OUTPUT_STRENGTH(d_inout[i]) = STRONG;
@ -495,7 +496,7 @@ void ucm_d_cosim(ARGS)
} else { } else {
char **args; char **args;
ip->info.lib_argc = PARAM_SIZE(lib_args);
ip->info.lib_argc = (unsigned int)PARAM_SIZE(lib_args);
args = malloc((ip->info.lib_argc + 1) * sizeof (char *)); args = malloc((ip->info.lib_argc + 1) * sizeof (char *));
if (args) { if (args) {
for (i = 0; i < ip->info.lib_argc; ++i) for (i = 0; i < ip->info.lib_argc; ++i)
@ -511,7 +512,7 @@ void ucm_d_cosim(ARGS)
} else { } else {
char **args; char **args;
ip->info.sim_argc = PARAM_SIZE(sim_args);
ip->info.sim_argc = (unsigned int)PARAM_SIZE(sim_args);
args = malloc((ip->info.sim_argc + 1) * sizeof (char *)); args = malloc((ip->info.sim_argc + 1) * sizeof (char *));
if (args) { if (args) {
for (i = 0; i < ip->info.sim_argc; ++i) for (i = 0; i < ip->info.sim_argc; ++i)
@ -527,7 +528,7 @@ void ucm_d_cosim(ARGS)
/* Check lengths. */ /* Check lengths. */
ins = PORT_NULL(d_in) ? 0 : PORT_SIZE(d_in);
ins = PORT_NULL(d_in) ? 0 : (unsigned int)PORT_SIZE(d_in);
if (ins != ip->info.in_count) { if (ins != ip->info.in_count) {
cm_message_printf("Warning: mismatched XSPICE/co-simulator " cm_message_printf("Warning: mismatched XSPICE/co-simulator "
"input counts: %d/%d.", "input counts: %d/%d.",
@ -548,7 +549,7 @@ void ucm_d_cosim(ARGS)
/* Create input queue and output buffer. */ /* Create input queue and output buffer. */
ip->q_index = -1; ip->q_index = -1;
ip->q_length = PARAM(queue_size);
ip->q_length = (unsigned int)PARAM(queue_size);
ip->in_ports = ins; ip->in_ports = ins;
ip->out_ports = outs; ip->out_ports = outs;
ip->inout_ports = inouts; ip->inout_ports = inouts;
@ -570,13 +571,13 @@ void ucm_d_cosim(ARGS)
/* Allocate XSPICE rotating storage to track changes. */ /* Allocate XSPICE rotating storage to track changes. */
cm_event_alloc(0, (ins + inouts) * sizeof (Digital_t));
cm_event_alloc(1, (outs + inouts) * sizeof (Digital_t));
cm_event_alloc(0, (int)((ins + inouts) * sizeof (Digital_t)));
cm_event_alloc(1, (int)((outs + inouts) * sizeof (Digital_t)));
/* Declare irreversible. */ /* Declare irreversible. */
if (PARAM(irreversible) > 0) if (PARAM(irreversible) > 0)
cm_irreversible(PARAM(irreversible));
cm_irreversible((unsigned int)PARAM(irreversible));
return; return;
/* Handle malloc failures. */ /* Handle malloc failures. */
@ -595,10 +596,10 @@ void ucm_d_cosim(ARGS)
/* Error state. Do nothing at all. */ /* Error state. Do nothing at all. */
ports = PORT_NULL(d_out) ? 0 : PORT_SIZE(d_out);
ports = PORT_NULL(d_out) ? 0 : (unsigned int)PORT_SIZE(d_out);
for (i = 0; i < ports; ++i) for (i = 0; i < ports; ++i)
OUTPUT_CHANGED(d_out[i]) = FALSE; OUTPUT_CHANGED(d_out[i]) = FALSE;
ports = PORT_NULL(d_inout) ? 0 : PORT_SIZE(d_inout);
ports = PORT_NULL(d_inout) ? 0 : (unsigned int)PORT_SIZE(d_inout);
for (i = 0; i < ports; ++i) for (i = 0; i < ports; ++i)
OUTPUT_CHANGED(d_inout[i]) = FALSE; OUTPUT_CHANGED(d_inout[i]) = FALSE;
return; return;

23
src/xspice/verilog/icarus_shim.c
View File

@ -49,7 +49,8 @@ static void input(struct co_info *pinfo, unsigned int bit, Digital_t *val)
{ {
struct ng_vvp *ctx = (struct ng_vvp *)pinfo->handle; struct ng_vvp *ctx = (struct ng_vvp *)pinfo->handle;
struct ngvp_port *pp; struct ngvp_port *pp;
int count, a, b, dirty;
unsigned int count;
int a, b, dirty;
/* Convert the value. */ /* Convert the value. */
@ -116,7 +117,6 @@ static void input(struct co_info *pinfo, unsigned int bit, Digital_t *val)
static void step(struct co_info *pinfo) static void step(struct co_info *pinfo)
{ {
struct ng_vvp *ctx = (struct ng_vvp *)pinfo->handle; struct ng_vvp *ctx = (struct ng_vvp *)pinfo->handle;
int i;
/* Let VVP run. It will stop when it has caught up with SPICE time /* Let VVP run. It will stop when it has caught up with SPICE time
* (pinfo->vtime) or produced output. * (pinfo->vtime) or produced output.
@ -128,17 +128,16 @@ static void step(struct co_info *pinfo)
if (ctx->out_pending) { if (ctx->out_pending) {
struct ngvp_port *pp; struct ngvp_port *pp;
uint32_t changed, mask;
int limit, i, bit;
uint32_t changed, mask, limit, i, bit;
limit = ctx->outs + ctx->inouts; limit = ctx->outs + ctx->inouts;
for (i = 0, pp = ctx->ports + ctx->ins; i < limit; ++i, ++pp) { for (i = 0, pp = ctx->ports + ctx->ins; i < limit; ++i, ++pp) {
if (!(pp->flags & OUT_PENDING)) if (!(pp->flags & OUT_PENDING))
continue; continue;
pp->flags &= ~OUT_PENDING;
changed = (pp->new.aval ^ pp->previous.aval) |
(pp->new.bval ^ pp->previous.bval);
pp->flags &= (uint16_t)~OUT_PENDING;
changed = (uint32_t)((pp->new.aval ^ pp->previous.aval) |
(pp->new.bval ^ pp->previous.bval));
if (changed) { if (changed) {
bit = pp->position; bit = pp->position;
mask = 1 << (pp->bits - 1); mask = 1 << (pp->bits - 1);
@ -147,10 +146,10 @@ static void step(struct co_info *pinfo)
const Digital_t lv_vals[] = const Digital_t lv_vals[] =
{ {ZERO, STRONG}, {ONE, STRONG}, { {ZERO, STRONG}, {ONE, STRONG},
{ZERO, HI_IMPEDANCE}, {UNKNOWN, STRONG} }; {ZERO, HI_IMPEDANCE}, {UNKNOWN, STRONG} };
int a, b;
uint32_t a, b;
a = (pp->new.aval & mask) != 0;
b = (pp->new.bval & mask) != 0;
a = ((uint32_t)pp->new.aval & mask) != 0;
b = ((uint32_t)pp->new.bval & mask) != 0;
a += (b << 1); a += (b << 1);
pinfo->out_fn(pinfo, bit, (Digital_t *)lv_vals + a); pinfo->out_fn(pinfo, bit, (Digital_t *)lv_vals + a);
changed &= ~mask; changed &= ~mask;
@ -202,7 +201,7 @@ struct ng_vvp *Get_ng_vvp(void)
/* Thread start function runs the Verilog simulation. */ /* Thread start function runs the Verilog simulation. */
void *run_vvp(void *arg)
static void *run_vvp(void *arg)
{ {
static const char * const fn_names[] = { VVP_FN_0, VVP_FN_1, VVP_FN_2, static const char * const fn_names[] = { VVP_FN_0, VVP_FN_1, VVP_FN_2,
VVP_FN_3, VVP_FN_4, 0 }; VVP_FN_3, VVP_FN_4, 0 };
@ -233,7 +232,7 @@ void *run_vvp(void *arg)
fns.add_module_path("."); fns.add_module_path(".");
file = (pinfo->lib_argc >= 3) ? pinfo->lib_argv[2] : NULL; // VVP log file. file = (pinfo->lib_argc >= 3) ? pinfo->lib_argv[2] : NULL; // VVP log file.
fns.init(file, pinfo->sim_argc, (char **)pinfo->sim_argv);
fns.init(file, (int)pinfo->sim_argc, (char **)pinfo->sim_argv);
fns.no_signals(); fns.no_signals();
/* The VPI file will usually be /usr/local/lib/ngspice/ivlng.vpi /* The VPI file will usually be /usr/local/lib/ngspice/ivlng.vpi

11
src/xspice/verilog/vpi.c
View File

@ -65,7 +65,7 @@ static double get_time(struct ng_vvp *ctx)
vpi_get_time(NULL, &now); vpi_get_time(NULL, &now);
ticks = ((uint64_t)now.high << 32) + now.low; ticks = ((uint64_t)now.high << 32) + now.low;
return ticks * ctx->tick_length;
return (double)ticks * ctx->tick_length;
} }
/* Arrange for end_advance_cb() to be called in the future. */ /* Arrange for end_advance_cb() to be called in the future. */
@ -75,8 +75,8 @@ static vpiHandle set_stop(uint64_t length, struct ng_vvp *ctx)
static struct t_vpi_time now = { .type = vpiSimTime }; static struct t_vpi_time now = { .type = vpiSimTime };
static struct t_cb_data cbd = { .cb_rtn = next_advance_cb, .time = &now }; static struct t_cb_data cbd = { .cb_rtn = next_advance_cb, .time = &now };
now.low = length;
now.high = length >> 32;
now.low = (unsigned int)length;
now.high = (unsigned int)(length >> 32);
if (length == 0) if (length == 0)
cbd.reason = cbReadWriteSynch; cbd.reason = cbReadWriteSynch;
else else
@ -157,7 +157,8 @@ static PLI_INT32 next_advance_cb(struct t_cb_data *cb)
continue; continue;
} }
ticks = (ctx->cosim_context->vtime - vl_time) / ctx->tick_length;
ticks = (uint64_t)
((ctx->cosim_context->vtime - vl_time) / ctx->tick_length);
if (ticks > 0) { if (ticks > 0) {
DBG("Advancing from %g to %g: %lu ticks\n", DBG("Advancing from %g to %g: %lu ticks\n",
vl_time, ctx->cosim_context->vtime, ticks); vl_time, ctx->cosim_context->vtime, ticks);
@ -328,7 +329,7 @@ static PLI_INT32 start_cb(struct t_cb_data *cb)
default: default:
continue; continue;
} }
pp->bits = vpi_get(vpiSize, item);
pp->bits = (uint16_t)vpi_get(vpiSize, item);
pp->flags = 0; pp->flags = 0;
pp->position = first ? 0 : pp[-1].position + pp[-1].bits; pp->position = first ? 0 : pp[-1].position + pp[-1].bits;
pp->previous.aval = pp->previous.bval = 0; pp->previous.aval = pp->previous.bval = 0;

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