diff --git a/DEVICES b/DEVICES index 83e92d430..e14c3c715 100644 --- a/DEVICES +++ b/DEVICES @@ -1,198 +1,776 @@ -src/frontend/device.c: ft_sim->devices[dg->dev_type_no]->name, -src/frontend/device.c: ft_sim->devices[dg->dev_type_no]->description); -src/frontend/device.c: if (ft_sim->devices[dg->dev_type_no]->numModelParms) { -src/frontend/device.c: } else if (ft_sim->devices[dg->dev_type_no]->numModelParms) { -src/frontend/device.c: ft_sim->devices[dg->dev_type_no]->name, -src/frontend/device.c: ft_sim->devices[dg->dev_type_no]->description); -src/frontend/device.c: xcount = *ft_sim->devices[dg->dev_type_no]->numInstanceParms; -src/frontend/device.c: plist = ft_sim->devices[dg->dev_type_no]->instanceParms; -src/frontend/device.c: xcount = *ft_sim->devices[dg->dev_type_no]->numModelParms; -src/frontend/device.c: plist = ft_sim->devices[dg->dev_type_no]->modelParms; -src/frontend/device.c: xcount = *ft_sim->devices[dg->dev_type_no]->numInstanceParms; -src/frontend/device.c: plist = ft_sim->devices[dg->dev_type_no]->instanceParms; -src/frontend/device.c: xcount = *ft_sim->devices[dg->dev_type_no]->numModelParms; -src/frontend/device.c: plist = ft_sim->devices[dg->dev_type_no]->modelParms; -src/frontend/device.c: (*ft_sim->askInstanceQuest)(ft_curckt->ci_ckt, dg->instance, -src/frontend/device.c: (*ft_sim->askModelQuest)(ft_curckt->ci_ckt, dg->model, -src/frontend/gens.c: && (ft_sim->devices[dg->dev_type_no]->flags -src/frontend/misccoms.c: (void) sprintf(buf, SYSTEM_MAIL, ft_sim->simulator, -src/frontend/misccoms.c: ft_sim->version, Bug_Addr); -src/frontend/misccoms.c: fprintf(cp_out, "** %s-%s : %s\n", ft_sim->simulator, -src/frontend/misccoms.c: ft_sim->version, ft_sim->description); -src/frontend/misccoms.c: fprintf(cp_out, "** %s-%s\n", ft_sim->simulator, -src/frontend/misccoms.c: ft_sim->version); -src/frontend/misccoms.c: fprintf(cp_out, "** %s-%s : %s\n", ft_sim->simulator, -src/frontend/misccoms.c: ft_sim->version, ft_sim->description); -src/frontend/misccoms.c: } else if (!eq(ft_sim->version, s)) { -src/frontend/misccoms.c: wl->wl_word, ft_sim->version); -src/frontend/misccoms.c: printf("%s-%s done\n", ft_sim->simulator, ft_sim->version); -src/frontend/outitf.c: fprintf(run->fp, "Command: version %s\n", ft_sim->version); -src/frontend/shyu.c: err=(*(ft_sim->deleteTask))(ft_curckt->ci_ckt, -src/frontend/shyu.c: err = (*(ft_sim->newTask))(ft_curckt->ci_ckt, -src/frontend/shyu.c: for(j=0;jnumAnalyses;j++) { -src/frontend/shyu.c: if(strcmp(ft_sim->analyses[j]->name,"options")==0) { -src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"options", -src/frontend/shyu.c: for(j=0;jnumAnalyses;j++) { -src/frontend/shyu.c: if(strcmp(ft_sim->analyses[j]->name,"SEN")==0) { -src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"sense", -src/frontend/shyu.c: for(j=0;jnumAnalyses;j++) { -src/frontend/shyu.c: if(strcmp(ft_sim->analyses[j]->name,"AC")==0) { -src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"acan", -src/frontend/shyu.c: for(i=0;inumAnalyses;i++) { -src/frontend/shyu.c: if(strcmp(ft_sim->analyses[i]->name,"DCOP")==0) { -src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"dcop", -src/frontend/shyu.c: for(i=0;inumAnalyses;i++) { -src/frontend/shyu.c: if(strcmp(ft_sim->analyses[i]->name,"DCTransfer")==0) { -src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"DCtransfer", -src/frontend/shyu.c: for(j=0;jnumAnalyses;j++) { -src/frontend/shyu.c: if(strcmp(ft_sim->analyses[j]->name,"TRAN")==0) { -src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"tranan", -src/frontend/shyu.c: for(i=0;ianalyses[save]->numParms;i++) { -src/frontend/shyu.c: ft_sim->analyses[save]->analysisParms[i]. -src/frontend/shyu.c: if(ft_sim->analyses[save]->analysisParms[i]. -src/frontend/shyu.c: error = (*(ft_sim->setAnalysisParm))(ckt, -src/frontend/shyu.c: senseJob, ft_sim->analyses[save]-> -src/frontend/shyu.c: parm = INPgetValue(ckt,&line,ft_sim-> -src/frontend/shyu.c: error = (*(ft_sim->setAnalysisParm))(ckt, -src/frontend/shyu.c: senseJob, ft_sim->analyses[save]-> -src/frontend/shyu.c: if(i==ft_sim->analyses[save]->numParms) { -src/frontend/shyu.c: if((err = (*(ft_sim->doAnalyses))(ckt, 1, ft_curckt->ci_curTask))!=OK){ -src/frontend/spiceif.c: err = (*(ft_sim->newCircuit))(&ckt); -src/frontend/spiceif.c: (*(ft_sim->newTask))(ckt,(void**)&(ft_curckt->ci_defTask),taskUid); -src/frontend/spiceif.c: (*(ft_sim->newTask))(ckt,(void**)&(ft_curckt->ci_defTask),taskUid, -src/frontend/spiceif.c: for(j=0;jnumAnalyses;j++) { -src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[j]->name,"options")==0) { -src/frontend/spiceif.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,optUid, -src/frontend/spiceif.c: (INPtables *) *tab,ft_curckt->ci_defTask, ft_sim->nodeParms, -src/frontend/spiceif.c: ft_sim->numNodeParms); -src/frontend/spiceif.c: err=(*(ft_sim->deleteTask))(ft_curckt->ci_ckt, -src/frontend/spiceif.c: err = (*(ft_sim->newTask))(ft_curckt->ci_ckt, -src/frontend/spiceif.c: err = (*(ft_sim->newTask))(ft_curckt->ci_ckt, -src/frontend/spiceif.c: for(j=0;jnumAnalyses;j++) { -src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[j]->name,"options")==0) { -src/frontend/spiceif.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,optUid, -src/frontend/spiceif.c: if ((err = (*(ft_sim->doAnalyses))(ckt, 1, ft_curckt->ci_curTask))!=OK){ -src/frontend/spiceif.c: if ((err = (*(ft_sim->doAnalyses))(ckt, 0, ft_curckt->ci_curTask))!=OK){ -src/frontend/spiceif.c: for(i=0;inumAnalyses;i++) { -src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[i]->name,"options")==0) { -src/frontend/spiceif.c: for (i = 0; i < ft_sim->analyses[which]->numParms; i++) -src/frontend/spiceif.c: if (eq(ft_sim->analyses[which]->analysisParms[i].keyword, name) && -src/frontend/spiceif.c: (ft_sim->analyses[which]->analysisParms[i].dataType & IF_SET)) -src/frontend/spiceif.c: if (i == ft_sim->analyses[which]->numParms) { -src/frontend/spiceif.c: switch (ft_sim->analyses[which]->analysisParms[i].dataType & IF_VARTYPES) { -src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].dataType); -src/frontend/spiceif.c: if ((err = (*(ft_sim->setAnalysisParm))(cc, (void *)ft_curckt->ci_curOpt, -src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id, &pval, -src/frontend/spiceif.c: if ((err = (*(ft_sim->setAnalysisParm))(cc, (void *)ft_curckt->ci_defOpt, -src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id, &pval, -src/frontend/spiceif.c: switch(ft_sim->analyses[which]->analysisParms[i].dataType & IF_VARTYPES) { -src/frontend/spiceif.c: (*(ft_sim->deleteCircuit))(cc); -src/frontend/spiceif.c: device = ft_sim->devices[typecode]; -src/frontend/spiceif.c: device = ft_sim->devices[typecode]; -src/frontend/spiceif.c: device = ft_sim->devices[typecode]; -src/frontend/spiceif.c: err = (*(ft_sim->askInstanceQuest))((void *)ckt, (void *)dev, -src/frontend/spiceif.c: err = (*(ft_sim->askModelQuest))((void*)ckt, (void *) mod, -src/frontend/spiceif.c: err = (*(ft_sim->setInstanceParm))((void *)ckt, (void *)dev, -src/frontend/spiceif.c: err = (*(ft_sim->setModelParm))((void*)ckt, (void *) mod, -src/frontend/spiceif.c: err = (*(ft_sim->findInstance))((void *)ck,&type,devptr,name,NULL,NULL); -src/frontend/spiceif.c: err = (*(ft_sim->findModel))((void *)ck,&type,modptr,name); -src/frontend/spiceif.c: for(i=0;ianalyses[which]->numParms;i++) { -src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[which]->analysisParms[i].keyword,name)==0) { -src/frontend/spiceif.c: return( (*(ft_sim->askAnalysisQuest))(ckt,anal, -src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id,parm, -src/frontend/spiceif.c: for(i=0;inumAnalyses;i++) { -src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[i]->name,"TRAN")==0){ -src/frontend/spiceif.c: err =(*(ft_sim->findAnalysis))(ci->ci_ckt,&which, &anal,tranUid, -src/frontend/spiceif.c: for(i=0;inumAnalyses;i++) { -src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[i]->name,"options")==0) { -src/frontend/spiceif.c: for (i = 0; i < ft_sim->analyses[which]->numParms; i++) -src/frontend/spiceif.c: if (eq(ft_sim->analyses[which]->analysisParms[i].keyword, name)) -src/frontend/spiceif.c: if (i == ft_sim->analyses[which]->numParms) -src/frontend/spiceif.c: if ((*(ft_sim->askAnalysisQuest))(ckt, ft_curckt->ci_curTask, -src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id, &parm, -src/frontend/spiceif.c: return (parmtovar(&parm, &(ft_sim->analyses[which]->analysisParms[i]))); -src/frontend/spiceif.c: for (i = 0, vars = v = NULL; ianalyses[which]->numParms; i++) { -src/frontend/spiceif.c: if(!(ft_sim->analyses[which]->analysisParms[i].dataType&IF_ASK)) { -src/frontend/spiceif.c: if ((*(ft_sim->askAnalysisQuest))(ckt, ft_curckt->ci_curTask, -src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id, -src/frontend/spiceif.c: &(ft_sim->analyses[which]->analysisParms[i])); -src/frontend/spiceif.c: &(ft_sim->analyses[which]->analysisParms[i])); -src/frontend/where.c: msg = (*ft_sim->nonconvErr)((void *) (ft_curckt->ci_ckt), 0); -src/frontend/where.c: msg = (*ft_sim->nonconvErr)((void *) (ft_curckt->ci_ckt), 0); -src/include/inpmacs.h:error=(*(ft_sim->func))args;\ -src/main.c: cp_program = ft_sim->simulator; -src/spicelib/devices/dev.c: * ft_sim->numDevices = num_devices(); -src/spicelib/devices/dev.c: ft_sim->numDevices = DEVNUM; -src/spicelib/devices/dev.c: ft_sim->devices = devices_ptr(); -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "NOISE") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "OP") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "DISTO") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "AC") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "PZ") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "DC") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "TF") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "TRAN") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "SENS") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) { -src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "SENS2") == 0) { -src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->analyses[which]->numParms; i++) { -src/spicelib/parser/inp2dot.c: ft_sim->analyses[which]->analysisParms[i].keyword)) { -src/spicelib/parser/inp2dot.c: if (ft_sim->analyses[which]->analysisParms[i].dataType & IF_FLAG) { -src/spicelib/parser/inp2dot.c: (*(ft_sim->setAnalysisParm)) (ckt, foo, -src/spicelib/parser/inp2dot.c: ft_sim->analyses[which]->analysisParms[i].id, -src/spicelib/parser/inp2dot.c: ft_sim->analyses[which]->analysisParms[i].dataType, tab); -src/spicelib/parser/inp2dot.c: (*(ft_sim->setAnalysisParm)) (ckt, foo, -src/spicelib/parser/inp2dot.c: ft_sim-> -src/spicelib/parser/inp2dot.c: if (i == ft_sim->analyses[which]->numParms) { -src/spicelib/parser/inpapnam.c: if (parmname && ft_sim->analyses[type]) { -src/spicelib/parser/inpapnam.c: for (i = 0; i < ft_sim->analyses[type]->numParms; i++) -src/spicelib/parser/inpapnam.c: ft_sim->analyses[type]->analysisParms[i].keyword) == -src/spicelib/parser/inpapnam.c: return (*(ft_sim->setAnalysisParm)) (ckt, analPtr, -src/spicelib/parser/inpapnam.c: ft_sim-> -src/spicelib/parser/inpdoopt.c: for(i=0;inumAnalyses;i++) { -src/spicelib/parser/inpdoopt.c: prm = ft_sim->analyses[i]; -src/spicelib/parser/inpdoopt.c: error = (*(ft_sim->setAnalysisParm))(ckt,anal, -src/spicelib/parser/inpdpar.c: for (i = 0; i < (*(*(ft_sim->devices)[dev]).numInstanceParms); i++) { -src/spicelib/parser/inpdpar.c: ((*(ft_sim->devices)[dev]).instanceParms[i]. -src/spicelib/parser/inpdpar.c: ((*(ft_sim->devices)[dev]). -src/spicelib/parser/inpdpar.c: error = (*(ft_sim->setInstanceParm)) (ckt, fast, -src/spicelib/parser/inpdpar.c: (*(ft_sim->devices) -src/spicelib/parser/inpdpar.c: if (i == (*(*(ft_sim->devices)[dev]).numInstanceParms)) { -src/spicelib/parser/inpgmod.c: error = (*(ft_sim->newModel)) (ckt, (modtmp)->INPmodType, -src/spicelib/parser/inpgmod.c: for (j = 0; j < (* (*(ft_sim->devices)[(modtmp)->INPmodType]).numModelParms); j++) { -src/spicelib/parser/inpgmod.c: if (strcmp("cpl", ((*(ft_sim->devices) [ (modtmp)->INPmodType ]).modelParms[j].keyword)) == 0) { -src/spicelib/parser/inpgmod.c: if (strcmp(parm,((*(ft_sim->devices)[(modtmp)->INPmodType]).modelParms[j].keyword)) == 0) { -src/spicelib/parser/inpgmod.c: val = INPgetValue(ckt, &line, ((* (ft_sim->devices)[(modtmp)->INPmodType]).modelParms[j].dataType), tab); -src/spicelib/parser/inpgmod.c: error = (*(ft_sim->setModelParm)) (ckt, ((modtmp)->INPmodfast), -src/spicelib/parser/inpgmod.c: (* (ft_sim->devices)[(modtmp)->INPmodType]).modelParms[j].id, -src/spicelib/parser/inpgmod.c: (*(ft_sim->devices) -src/spicelib/parser/inpgtitl.c: error = (*(ft_sim->newCircuit)) (ckt); -src/spicelib/parser/inppname.c: for (i = 0; i < (*(*(ft_sim->devices)[dev]).numInstanceParms); i++) { -src/spicelib/parser/inppname.c: ((*(ft_sim->devices)[dev]).instanceParms[i].keyword)) == -src/spicelib/parser/inppname.c: (*(ft_sim->setInstanceParm)) (ckt, fast, -src/spicelib/parser/inppname.c: (*(ft_sim->devices)[dev]). -src/spicelib/parser/inppname.c: if (i == (*(*(ft_sim->devices)[dev]).numInstanceParms)) { -src/spicelib/parser/inpptree.c: for (i = 0; i < ft_sim->numSpecSigs; i++) -src/spicelib/parser/inpptree.c: if (!strcmp(ft_sim->specSigs[i], buf)) -src/spicelib/parser/inpptree.c: if (i < ft_sim->numSpecSigs) { -src/spicelib/parser/inpsymt.c: error = (*(ft_sim->newNode)) (ckt, &t->t_node, *token); -src/spicelib/parser/inpsymt.c: error = (*(ft_sim->groundNode)) (ckt, &t->t_node, *token); -src/spicelib/parser/inptyplk.c: for (i = 0; i < ft_sim->numDevices; i++) { -src/spicelib/parser/inptyplk.c: printf("In INPtypelook, checking model type = %s against existing model = %s, . . .\n", type, (*(ft_sim->devices)[i]).name ); -src/spicelib/parser/inptyplk.c: if ((ft_sim->devices)[i] && strcmp(type, (*(ft_sim->devices)[i]).name) == 0) { -src/xspice/mif/mifgetmod.c: error = (*(ft_sim->newModel))( ckt,(modtmp)->INPmodType, -src/xspice/mif/mifgetmod.c: for(j=0;j<*((*(ft_sim->devices)[(modtmp)->INPmodType]).numModelParms); j++) { -src/xspice/mif/mifgetmod.c: if (strcmp(parm,((*(ft_sim->devices) [ (modtmp)-> -src/xspice/mif/mifgetmod.c: ((*(ft_sim->devices)[(modtmp)-> -src/xspice/mif/mifgetmod.c: error = (*(ft_sim->setModelParm))(ckt, -src/xspice/mif/mifgetmod.c: (*(ft_sim->devices)[(modtmp)->INPmodType ]). -src/xspice/mif/mifgetmod.c: if(j >= *((*(ft_sim->devices)[(modtmp)->INPmodType]).numModelParms)) +DEVICES +--------------------------------------------------------------------------- + +This file contains the status of devices available in ngspice. This file +will be updated every time the device specific code is altered or changed. +This file is useful in writing ngspice documentation. + + +*************************************************************************** +************************* Linear devices ******************************** +*************************************************************************** + +CAP - Capacitor + Initial Release. + Ver: N/A + Class: C + Level: 1 (and only) + Dir: devices/cap + Status: + + Enhancements over the original model: + + - Parallel Multiplier + - Temperature difference from circuit temperature + - Preliminary technology scaling support + - Model capacitance + - Cj calculation based on relative dielectric constant + and insulator thickness + +IND - Inductor + Initial Release. + Ver: N/A + Class: L + Level: 1 (and only) + Dir: devices/ind + Status: + + Enhancements over the original model: + + - Parallel Multiplier + - Temperature difference from circuit temperature + - Preliminary technology scaling support + - Model inductance + - Inductance calculation for toroids or solenoids + on the model line. + +RES - Simple linear resistor + Initial Release. + Ver: N/A + Class: R + Level: 1 (and only) + Dir: devices/res + Status: + + Enhancements over the original model: + + - Parallel Multiplier + - Different value for ac analysis + - Temperature difference from circuit temperature + - Noiseless resistor + - Flicker noise + - Preliminary technology scaling support + + +*************************************************************************** +********************* Distributed elements ******************************** +*************************************************************************** + +CPL - Simple Coupled Multiconductor Lines (Kspice) + Initial Release. + Ver: N/A + Class: P + Level: 1 (and only) + Dir: devices/cpl + Status: + + This model comes from swec and kspice. It is not documented, if + you have kspice docs, can you write a short description + of its use ? + + - Does not implement parallel code switches + - Probably a lot of memory leaks + + Enhancements over the original model: + + - Better integrated into ngspice adding CPLask, CPLmAsk and + CPLunsetup functions + + +LTRA - Lossy Transmission line + Initial Release. + Ver: N/A + Class: O + Level: 1 (and only) + Dir: devices/ltra + Status: + + Original spice model. + + - Does not implement parallel code switches + +TRA - Transmission line + Initial Release. + Ver: N/A + Class: T + Level: 1 (and only) + Dir: devices/tra + Status: + + Original spice model. + + - Does not implement parallel code switches + +TXL - Simple Lossy Transmission Line (Kspice) + Initial Release. + Ver: N/A + Class: Y + Level: 1 (and only) + Dir: devices/txl + Status: + + This model comes from kspice. It is not documented, if + you have kspice docs, can you write a short description + of its use ? + + There is some code left out from compilation: + TXLaccept and TXLfindBr. Any ideas ? + + - Does not implement parallel code switches + + +URC - Uniform distributed RC line + Initial Release. + Ver: N/A + Class: U + Level: 1 (and only) + Dir: devices/urc + Status: + + Original spice model. + + - Does not implement parallel code switches + + +*************************************************************************** +**************************** V/I Sources ***************************** +*************************************************************************** + +ASRC - Arbitrary Source + Initial Release. + Ver: N/A + Class: B + Level: 1 (and only) + Dir: devices/asrc + Status: + + The arbitrary source code has been corrected with the patch + available on the Internet. There is still an issue to fix, the + current of current-controlled generators. + +CCCS - Current Controlled Current Source + Initial Release. + Ver: N/A + Class: F + Level: 1 (and only) + Dir: devices/cccs + Status: + + Original spice model. + +CCVS - Current Controlled Voltage Source + Initial Release. + Ver: N/A + Class: H + Level: 1 (and only) + Dir: devices/ccvs + Status: + + Original spice model. + +ISRC - Independent Current Source + Initial Release. + Ver: N/A + Class: I + Level: 1 (and only) + Dir: devices/isrc + Status: + + This is the original spice device improved by Alan Gillespie + with the following features: + + - Source ramping + - Check for non-monotonic series in PWL + + +VCCS - Voltage Controlled Current Source + Initial Release. + Ver: N/A + Class: G + Level: 1 (and only) + Dir: devices/vccs + Status: + + Original spice model. + +VCVS - Voltage Controlled Voltage Source + Initial Release. + Ver: N/A + Class: E + Level: 1 (and only) + Dir: devices/vcvs + Status: + + Original spice model. + +VSRC - Independent Voltage Source + Initial Release. + Ver: N/A + Class: V + Level: 1 (and only) + Dir: devices/vsrc + Status: + + This is the original spice device improved by Alan Gillespie + with the following features: + + - Source ramping + - Check for non-monotonic series in PWL + + +*************************************************************************** +**************************** Switches **************************** +*************************************************************************** + +CSW - Current controlled switch + Initial Release. + Ver: N/A + Class: W + Level: 1 (and only) + Dir: devices/csw + Status: + + This model comes from Jon Engelbert + + +SW - Voltage controlled switch + Initial release + Ver: N/A + Class: S + Level: 1 (and only) + Dir: devices/sw + Status: + + This model comes from Jon Engelbert + + +*************************************************************************** +**************************** Diodes **************************** +*************************************************************************** + +DIO - Junction Diode + Initial Release. + Ver: N/A + Class: D + Level: 1 (and only) + Dir: devices/dio + Status: + + Enhancements over the original model: + + - Parallel Multiplier + - Temperature difference from circuit temperature + - Forward and reverse knee currents + - Periphery (sidewall) effects + - Temperature correction of some parameters + + +*************************************************************************** +************************* Bipolar Devices ************************* +*************************************************************************** + +BJT - Bipolar Junction Transistor + Initial Release. + Ver: N/A + Class: Q + Level: 1 + Dir: devices/bjt + Status: + + Enhancements over the original model: + + - Parallel Multiplier + - Temperature difference from circuit temperature + - Different area parameters for collector, base and emitter + +BJT2 - Bipolar Junction Transistor + Initial Release. + Ver: N/A + Class: Q + Level: 2 + Dir: devices/bjt2 + Status: + + This is the BJT model written by Alan Gillespie to support lateral + devices. The model has been hacked by Dietmar Warning fixing some bugs + and adding some features (temp. correction on resistors). + + Enhancements over the original model: + + - Temperature correction on rc,rb,re + - Parallel Multiplier + - Temperature difference from circuit temperature + - Different area parameters for collector, base and emitter + +VBIC - Bipolar Junction Transistor + Initial Release. + Ver: N/A + Class: Q + Level: 4 + Dir: devices/vbic + Status: + + This is the Vertical Bipolar InterCompany model. + The author of VBIC is Colin McAndrew mcandrew@ieee.org + Spice3 Implementation: Dietmar Warning DAnalyse GmbH + warning@danalyse.de + Web Site: + http://www.designers-guide.com/VBIC/index.html + + Notes: This is the 4 terminals model, without excess phase + and thermal network. + + +*************************************************************************** +***************************** FET Devices *************************** +*************************************************************************** + +JFET - Junction Field Effect transistor + Initial Release. + Ver: N/A + Class: J + Level: 1 + Dir: devices/jfet + Status: + + This is the original spice JFET model. + + Enhancements over the original model: + + - Alan Gillespie's modified diode model + - Parallel multiplier + - Instance temperature as difference for circuit temperature + +JFET2 - Junction Field Effect Transistor (PS model) + Initial Release. + Ver: N/A + Class: J + Level: 2 + Dir: devices/jfet2 + Status: + + This is the Parker Skellern model for MESFETs. + + Web Site: + http://www.elec.mq.edu.au/cnerf/models/psmodel/ + + Enhancements over the original model: + + - Parallel multiplier + - Instance temperature as difference for circuit temperature + + +*************************************************************************** +*************************** HFET devices *************************** +*************************************************************************** + + Added code from macspice3f4 HFET1&2 and MESA model + Original note: + Added device calls for Mesfet models and HFET models + provided by Trond Ytterdal as of Nov 98 + +HFET1 - Heterostructure Field Effect Transistor Level 1 + Initial Release. + Ver: N/A + Class: Z + Level: 5 + Dir: devices/hfet1 + Status: + + This is the Heterostructure Field Effect Transistor model from: + K. Lee, M. Shur, T. A. Fjeldly and T. Ytterdal + "Semiconductor Device Modeling in VLSI", + 1993, Prentice Hall, New Jersey + + Enhancements over the original model: + + - Parallel multiplier + - Instance temperature as difference for circuit temperature + - Added pole-zero analysis + + +HFET2 - Heterostructure Field Effect Transistor Level 2 + Initial Release. + Ver: N/A + Class: Z + Level: 6 + Dir: devices/hfet2 + Status: + + Simplified version of hfet1 + + Enhancements over the original model: + + - Parallel multiplier + - Instance temperature as difference for circuit temperature + - Added pole-zero analysis + + +*************************************************************************** +*************************** MES devices *************************** +*************************************************************************** + +MES - MESFET model + Initial Release. + Ver: N/A + Class: Z + Level: 1 + Dir: devices/mes + Status: + + This is the original spice3 MESFET model (Statz). + + Enhancements over the original model: + + - Parallel multiplier + - Alan Gillespie junction diodes implementation + + + Added code from macspice3f4 HFET1&2 and MESA model + Original note: + Added device calls for Mesfet models and HFET models + provided by Trond Ytterdal as of Nov 98 + +MESA - MESFET model (MacSpice3f4) + Initial Release. + Ver: N/A + Class: Z + Level: 2,3,4 + Dir: devices/mesa + Status: + + This is a multilevel model. It contains code for mesa levels + 2,3 and 4 + + Enhancements over the original model: + + - Parallel multiplier + - Instance temperature as difference from circuit temperature + - Added pole-zero analysis + + +*************************************************************************** +**************************** MOS devices **************************** +*************************************************************************** + +MOS1 - Level 1 MOS model + Initial Release. + Ver: N/A + Class: M + Level: 1 + Dir: devices/mos1 + Status: + + This is the so-called Schichman-Hodges model. + + Enhancements over the original model: + + - Parallel multiplier + - Temperature difference from circuit temperature + + +MOS2 - Level 2 MOS model + Initial Release. + Ver: N/A + Class: M + Level: 2 + Dir: devices/mos2 + Status: + + This is the so-called Grove-Frohman model. + + Enhancements over the original model: + + - Parallel multiplier + - Temperature difference from circuit temperature + + +MOS3 - Level 3 MOS model + Initial Release. + Ver: N/A + Class: M + Level: 3 + Dir: devices/mos3 + Status: + + Enhancements over the original model: + + - Parallel multiplier + - Temperature difference from circuit temperature + + +MOS6 - Level 6 MOS model + Initial Release. + Ver: N/A + Class: M + Level: 6 + Dir: devices/mos6 + Status: + + Enhancements over the original model: + + - Parallel multiplier + - Temperature difference from circuit temperature + + +MOS9 - Level 9 MOS model + Initial Release. + Ver: N/A + Class: M + Level: 9 + Dir: devices/mos9 + Status: + + Enhancements over the original model: + + - Temperature difference from circuit temperature + + +BSIM1 - BSIM model level 1 + Initial Release. + Ver: N/A + Class: M + Level: 4 + Dir: devices/bsim1 + Status: + + Enhancements over the original model: + + - Parallel multiplier + - Noise analysis + + BUGS: + Distortion analysis probably does not + work with "parallel" devices. Equations + are too intricate to deal with. Any one + has ideas on the subject ? + + +BSIM2 - BSIM model level 2 + Initial Release. + Ver: N/A + Class: M + Level: 5 + Dir: devices/bsim2 + Status: + + Enhancements over the original model: + + - Parallel multiplier + - Noise analysis + + +BSIM3v0 - BSIM model level 3 + Initial Release. + Ver: 3.0 + Class: M + Level: 52 + Dir: devices/bsim3v0 + Status: TO BE TESTED AND IMPROVED + + +BSIM3v0 - BSIM model level 3 + Initial Release. + Ver: 3.0 + Class: M + Level: 51 + Dir: devices/bsim3v1a + Status: TO BE TESTED AND IMPROVED + + This is the BSIM3v3.0 model modified by Alan Gillespie. + + +BSIM3v1 - BSIM model level 3 + Initial Release. + Ver: 3.1 + Class: M + Level: 50 + Dir: devices/bsim3v1 + Status: TO BE TESTED + + +BSIM3v1 - BSIM model level 3 + Initial Release. + Ver: 3.1 + Class: M + Level: 49 + Dir: devices/bsim3v1s + Status: TO BE TESTED AND IMPROVED + + This is the BSIM3v3.1 model modified by Serban Popescu. + This is level 49 model. It is an implementation that supports + "HDIF" and "M" parameters. + + +BSIM3 - BSIM model level 3 + Initial Release. + Ver: 3.2.4 + Class: M + Level: 8 + Dir: devices/bsim3 + Status: TO BE TESTED + + This is the BSIM3v3.2.4 model from Berkeley device group. + You can find some test netlists with results for this model + on its web site. + + Web site: + http://www-device.eecs.berkeley.edu/~bsim3 + + Enhancements over the original model: + + - Parallel Multiplier + - ACM Area Calculation Method + - Multirevision code (supports all 3v3.2 minor revisions) + - NodesetFix + + +BSIM4 - BSIM model level 4 (0.18 um) + Initial Release. + Ver: 4.5.0 + Class: M + Level: 14 + Dir: devices/bsim4 + Status: TO BE TESTED + + This is the BSIM4 device model from Berkeley Device Group. + Test are available on its web site. + + Web site: + http://www-device.eecs.berkeley.edu/~bsim3/bsim4.html + + Updated to 4.5.0 YET UNTESTED. + + +HiSIM - Hiroshima-university STARC IGFET Model + Initial Release. + Ver: 1.2.0 + Class: M + Level: 64 + Dir: devices/hisim + Status: + + This is the HiSIM model available from Hiroshima University + (Ultra-Small Device Engineering Laboratory) + + Web site: + http://home.hiroshima-u.ac.jp/usdl/HiSIM.shtml + http://www.starc.or.jp/kaihatu/pdgr/hisim/index.html + + Enhancements over the original model: + + - Parallel Multiplier + - NodesetFix + + +*************************************************************************** +***************************** SOI Devices **************************** +*************************************************************************** + +BSIM3SOI_FD - SOI model (fully depleted devices) + Initial Release. + Ver: 2.1 + Class: M + Level: 55 + Dir: devices/bsim3soi_fd + Status: TO BE TESTED. + + FD model has been integrated. + There is a bsim3soifd directory under the test + hierarchy. Test circuits come from the bsim3soi + + Web site at: + http://www-device.eecs.berkeley.edu/~bsimsoi + + *) rework-14: removed #ifndef NEWCONV code. + + +BSIM3SOI_DD - SOI Model (dynamic depletion model) + Initial Release. + Ver: 2.1 + Class: M + Level: 56 + Dir: devices/bsim3soi_dd + Status: TO BE TESTED. + + There is a bsim3soidd directory under the + test hierarchy. Test circuits come from bsim3soi + + Web site at: + http://www-device.eecs.berkeley.edu/~bsimsoi + + *) rework-14: removed #ifndef NEWCONV code. + + +BSIM3SOI_PD - SOI model (partially depleted devices) + Initial Release. + Ver: 2.2.1 + Class: M + Level: 57 + Dir: devices/bsim3soi_pd + Status: TO BE TESTED. + + PD model has been integrated. + There is a bsim3soipd directory under the test + hierarchy. Test circuits come from the bsim3soi + + Web site at: + http://www-device.eecs.berkeley.edu/~bsimsoi + + *) rework-14: removed #ifndef NEWCONV code. + + +BSIMSOI - SOI model (partially/full depleted devices) + Initial Release. + Ver: 3.0 + Class: M + Level: 58 + Dir: devices/bsim3soi + Status: TO BE TESTED. + + This is the newer version from Berkeley. + Usable for partially/full depleted devices. + + Web site at: + http://www-device.eecs.berkeley.edu/~bsimsoi + + +SOI3 - STAG SOI3 Model + Initial Release. + Ver: 2.6 + Class: M + Level: 62 + Dir: devices/soi3 + Status: TO BE TESTED + + Web site at: + http://www.micro.ecs.soton.ac.uk/stag/ + + +*************************************************************************** +**************** Other devices not released as source code **************** +*************************************************************************** + +EKV - EKV model + Initial Release. + Ver: 2.6 + Class: M + Level: 44 + Dir: devices/ekv + Status: TO BE TESTED + + Note: This model is not released in source code. + You have to obtain the source code from the address below. + + Web site at: + http://legwww.epfl.ch/ekv/