diff --git a/ChangeLog b/ChangeLog
index f91f7e9b9..fdfd9a8cb 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,6 @@
+2009-12-20 Holger Vogt
+ * fixinf the time 0 value of sine in isrc, vsrc
+
 2009-12-19 Paolo Nenzi
  * src/spicelib/devices/isrc/isrcacct.c, src/spicelib/devices/vsrc/vsrcacct.c:
    fixed bug reported by Holger. "time" value in accept routine was incorrectly 
diff --git a/src/frontend/com_measure2.c b/src/frontend/com_measure2.c
index ff3ffe063..8d260bb4f 100644
--- a/src/frontend/com_measure2.c
+++ b/src/frontend/com_measure2.c
@@ -277,11 +277,15 @@ int measure_extract_variables( char *line )
    * .MEASURE {DC|AC|TRAN} result INTEG<RAL> out_variable 
    * + <TD=td> <FROM=val> <TO=val>
    *
-   * .MEASURE {DC|AC|TRAN} result DERIV<ATIVE> out_variable 
-   * + <TD=td> <FROM=val> <TO=val> <AT=val>
+   * .MEASURE {DC|AC|TRAN} result DERIV<ATIVE> out_variable AT=val
    *
-   * .MEASURE {DC|AC|TRAN} result DERIV<ATIVE> out_variable 
-   * + <TD=td> <FROM=val> <TO=val> <AT=val>
+   * .MEASURE {DC|AC|TRAN} result DERIV<ATIVE> out_variable WHEN out_variable2=val
+   * + <TD=td>
+   * + <CROSS=# | CROSS=LAST> <RISE=#|RISE=LAST> <FALL=#|FALL=LAST>
+   *
+   * .MEASURE {DC|AC|TRAN} result DERIV<ATIVE> out_variable WHEN out_variable2=out_variable3
+   * + <TD=td>
+   * + <CROSS=# | CROSS=LAST> <RISE=#|RISE=LAST> <FALL=#|FALL=LAST>
    * ----------------------------------------------------------------- */
 
     int len ;					/* length of string */
diff --git a/src/spicelib/devices/isrc/isrcload.c b/src/spicelib/devices/isrc/isrcload.c
index ede0d2bf4..168cc8a3c 100644
--- a/src/spicelib/devices/isrc/isrcload.c
+++ b/src/spicelib/devices/isrc/isrcload.c
@@ -139,12 +139,14 @@ ISRCload(GENmodel *inModel, CKTcircuit *ckt)
 
                     time -= TD;
                     if (time <= 0) {
-                        value = VO;
-                    } else {
 #ifdef XSPICE
-                        value = VO + VA * sin(FREQ*time * 2.0 * M_PI + phase) * 
+                        value = VO + VA * sin(phase);
+                    } else {
+                       value = VO + VA * sin(FREQ*time * 2.0 * M_PI + phase) * 
                                 exp(-time*THETA);
-#else		    
+#else
+                        value = VO;
+                    } else {
                         value = VO + VA * sin(FREQ*time * 2.0 * M_PI) * 
                                 exp(-time*THETA);
 #endif
diff --git a/src/spicelib/devices/vsrc/vsrcload.c b/src/spicelib/devices/vsrc/vsrcload.c
index e2e81791a..9a6f9ac1c 100644
--- a/src/spicelib/devices/vsrc/vsrcload.c
+++ b/src/spicelib/devices/vsrc/vsrcload.c
@@ -148,13 +148,16 @@ VSRCload(GENmodel *inModel, CKTcircuit *ckt)
 			   
                     time -= TD;
                     if (time <= 0) {
-                        value = VO;
-                    } else {
 #ifdef XSPICE
+                        value = VO + VA * sin(phase);
+                    } else {
+
                         value = VO + VA * sin(FREQ*time * 2.0 * M_PI + phase) * 
                                 exp(-time*THETA);
 #else						    
-                        value = VO + VA * sin(FREQ * time * 2.0 * M_PI) * 
+                        value = VO;
+                    } else {                        
+                       value = VO + VA * sin(FREQ * time * 2.0 * M_PI) * 
                                 exp(-(time*THETA));
 #endif
 /* gtri - end - wbk - add PHASE parameter */