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@ -1,4 +1,17 @@ |
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** NMOSFET: table generator with BSIM4 2D (Vdrain, Vgate) |
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** NMOSFET: table generator with BSIM4 3D (Vdrain, Vgate, Vbulk) |
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* This file may be run by 'ngspice table-generator-b4-3d.sp' |
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* It will generate a 3D data table by simulating the MOS drain current |
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* as function of drain and gate voltages. The simulation uses |
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* the ngspice BSIM4.6.1 MOS model and Berkeley model parameters. |
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* This table is an input file for the XSPICE 3D table model. |
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* You have to select NMOS or PMOS by manually editing this file: currently |
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* NMOS is selected. For PMOS change '*' in column 1 |
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* for CSPARAM, m1, outfile, echo *table... |
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* In addition you may change the step sizes vdstep vgstep vbstep in CSPARAM |
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* to obtain the required resolution for the data. |
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* These tables will contain pure dc data. For transient simulation you may |
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* need to add some capacitors to the device model for a 'real world' simulation. |
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*NMOS |
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*NMOS |
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.csparam vdstart=-0.1 |
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.csparam vdstart=-0.1 |
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.csparam vdstop=1.8 |
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.csparam vdstop=1.8 |
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@ -22,8 +35,8 @@ |
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*.csparam vbstep=0.2 |
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*.csparam vbstep=0.2 |
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** Circuit Description ** |
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** Circuit Description ** |
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m1 2 1 3 4 n1 L=0.13u W=10.0u rgeoMod=1 |
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*m1 2 1 3 4 p1 L=0.13u W=10.0u rgeoMod=1 |
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m1 2 1 3 4 nbsim4 L=0.13u W=10.0u rgeoMod=1 |
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*m1 2 1 3 4 pbsim4 L=0.13u W=10.0u rgeoMod=1 |
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vgs 1 0 1.8 |
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vgs 1 0 1.8 |
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vds 2 0 1.8 |
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vds 2 0 1.8 |
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vss 3 0 0 |
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vss 3 0 0 |
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@ -32,9 +45,11 @@ vbs 4 0 0 |
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.control |
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.control |
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** output file ** |
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** output file ** |
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set outfile = "bsim4n-3d-1.table" |
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set outfile = "bsim4n-3d-1.table" |
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*set outfile = "bsim4p-3d-1.table" |
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save i(vss) |
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save i(vss) |
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echo * 3D table for nmos bsim 4 > $outfile |
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echo * 3D table for nmos bsim 4 > $outfile |
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*echo * 3D table for nmos bsim 4 > $outfile |
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let xcount = floor((vdstop-vdstart)/vdstep) + 1 |
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let xcount = floor((vdstop-vdstart)/vdstep) + 1 |
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let ycount = floor((vgstop-vgstart)/vgstep) + 1 |
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let ycount = floor((vgstop-vgstart)/vgstep) + 1 |
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@ -101,7 +116,7 @@ while lcz < zcount |
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end |
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end |
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.endc |
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.endc |
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.include ./modelcards/modelcard.pmos |
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.include ./modelcards/modelcard.nmos |
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.include ./modelcards/modelcard.nmos |
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.include ./modelcards/modelcard.pmos |
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.end |
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.end |