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@ -29,7 +29,6 @@ MOS1load(GENmodel *inModel, CKTcircuit *ckt) |
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double GateSourceOverlapCap; |
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double OxideCap; |
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double SourceSatCur; |
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double arg; |
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double cbhat; |
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double cdhat; |
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double cdrain; |
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@ -51,7 +50,6 @@ MOS1load(GENmodel *inModel, CKTcircuit *ckt) |
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double gcgd; |
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double gcgs; |
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double geq; |
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double sarg; |
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double sargsw; |
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double vbd; |
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double vbs; |
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@ -568,7 +566,8 @@ next1: if(vbs <= -3*vt) { |
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/* can't bypass the diode capacitance calculations */ |
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if(here->MOS1Cbs != 0 || here->MOS1Cbssw != 0 ) { |
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if (vbs < here->MOS1tDepCap){ |
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arg=1-vbs/here->MOS1tBulkPot; |
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const double arg=1-vbs/here->MOS1tBulkPot; |
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double sarg; |
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/* |
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* the following block looks somewhat long and messy, |
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* but since most users use the default grading |
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@ -628,7 +627,8 @@ next1: if(vbs <= -3*vt) { |
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{ |
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if(here->MOS1Cbd != 0 || here->MOS1Cbdsw != 0 ) { |
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if (vbd < here->MOS1tDepCap) { |
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arg=1-vbd/here->MOS1tBulkPot; |
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const double arg=1-vbd/here->MOS1tBulkPot; |
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double sarg; |
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/* |
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* the following block looks somewhat long and messy, |
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* but since most users use the default grading |
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