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@ -30,7 +30,13 @@ a5 cntl clk var_clock |
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.control |
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tran 1us 10ms |
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write spifsim.raw |
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plot cntl out_msb+2 out_lsb+8 |
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eprvcd n_one clk n_zero msb lsb > spifsim.vcd |
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* plotting the vcd file (e.g. with GTKWave) |
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* For Windows: returns control to ngspice |
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shell start gtkwave spifsim.vcd --script $inputdir/nggtk.tcl |
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* Others |
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*shell gtkwave spifsim.vcd --script nggtk.tcl & |
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.endc |
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.end |