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@ -76,7 +76,7 @@ VSRCtemp(GENmodel *inModel, CKTcircuit *ckt) |
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if (!here->VSRCportZ0Given) |
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here->VSRCportZ0 = 50.0; |
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here->VSRCisPort = here->VSRCportZ0 > 0.0; |
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here->VSRCisPort = here->VSRCportZ0 > 0.0 && here->VSRCportNum > 0; |
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} |
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else |
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here->VSRCisPort = FALSE; |
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