From 659ade6cf2e868e17e3d2c6c92926ffc4bab467a Mon Sep 17 00:00:00 2001 From: dwarning Date: Fri, 13 Mar 2020 19:00:21 +0100 Subject: [PATCH] VDMOS few variable name changes --- src/spicelib/devices/vdmos/vdmosload.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/spicelib/devices/vdmos/vdmosload.c b/src/spicelib/devices/vdmos/vdmosload.c index 6c8a2d934..0416db3d1 100644 --- a/src/spicelib/devices/vdmos/vdmosload.c +++ b/src/spicelib/devices/vdmos/vdmosload.c @@ -83,7 +83,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt) double capgs = 0.0; /* total gate-source capacitance */ double capgd = 0.0; /* total gate-drain capacitance */ double capth = 0.0; /* total thermal capacitance */ - int Check_th, Check_diode; + int Check_th, Check_dio; int error; register int selfheat; @@ -690,7 +690,7 @@ bypass: vtebrk = model->VDIObrkdEmissionCoeff * vt; vbrknp = here->VDIOtBrkdwnV; - Check_diode = 1; + Check_dio = 1; if (ckt->CKTmode & MODEINITSMSIG) { vd = *(ckt->CKTstate0 + here->VDIOvoltage); } else if (ckt->CKTmode & MODEINITTRAN) { @@ -751,11 +751,11 @@ bypass: vdtemp = DEVpnjlim(vdtemp, -(*(ckt->CKTstate0 + here->VDIOvoltage) + vbrknp), vtebrk, - here->VDIOtVcrit, &Check_diode); + here->VDIOtVcrit, &Check_dio); vd = -(vdtemp + vbrknp); } else { vd = DEVpnjlim(vd, *(ckt->CKTstate0 + here->VDIOvoltage), - vte, here->VDIOtVcrit, &Check_diode); + vte, here->VDIOtVcrit, &Check_dio); } } /* @@ -852,7 +852,7 @@ bypass: * check convergence */ - if ((Check_th == 1) || (Check_diode == 1)) { + if ((Check_th == 1) || (Check_dio == 1)) { ckt->CKTnoncon++; ckt->CKTtroubleElt = (GENinstance *)here; }