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example default to available models

pre-master-46
dwarning 6 years ago
committed by Holger Vogt
parent
commit
3994f9de1a
  1. 14
      examples/Monte_Carlo/mc_ring_lib_complete_actual.cir

14
examples/Monte_Carlo/mc_ring_lib_complete_actual.cir

@ -19,12 +19,12 @@ vpe well 0 dc 3.3
.subckt inv1 dd ss sub well in out .subckt inv1 dd ss sub well in out
*XMP1 out in dd well p33ll w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1 *XMP1 out in dd well p33ll w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
*XMN1 out in ss sub n33ll w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1 *XMN1 out in ss sub n33ll w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
XMP1 out in dd well pch_5_mac w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
XMN1 out in ss sub nch_5_mac w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
*XMP1 out in dd well pch_5_mac w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
*XMN1 out in ss sub nch_5_mac w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
*XMP1 out in dd well pe3 w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1 *XMP1 out in dd well pe3 w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
*XMN1 out in ss sub ne3 w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1 *XMN1 out in ss sub ne3 w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
*MP1 out in dd well p1 w=5u l=800n m=3 ad=1.35p as=1.35p pd=9.6u ps=9.6u
*MN1 out in ss sub n1 w=5u l=800n m=1 ad=0.9p as=0.9p pd=6.6u ps=6.6u
MP1 out in dd well p1 w=5u l=800n m=3 ad=1.35p as=1.35p pd=9.6u ps=9.6u
MN1 out in ss sub n1 w=5u l=800n m=1 ad=0.9p as=0.9p pd=6.6u ps=6.6u
.ends inv1 .ends inv1
.subckt inv5 dd ss sub well in out .subckt inv5 dd ss sub well in out
@ -50,13 +50,13 @@ cout buf ss 0.2pF
* Chose the transistors for XMP1 and XMN1 according to the library * Chose the transistors for XMP1 and XMN1 according to the library
*.lib "jc_usage.l" MC_LIB *.lib "jc_usage.l" MC_LIB
*.lib "../../../various/lib-test/my_usage.l" MC_LIB *.lib "../../../various/lib-test/my_usage.l" MC_LIB
.lib "D:\Spice_general\tests\lib-test\ts14\my_ts_usage.l" MC_LIB
*.lib "D:\Spice_general\tests\lib-test\ts14\my_ts_usage.l" MC_LIB
*.lib "x_usage.l" MC_LIB *.lib "x_usage.l" MC_LIB
* or use the BSIM3 model with internal parameters except Vth0 * or use the BSIM3 model with internal parameters except Vth0
* that varies the threshold voltage +-3 sigma around a mean of +-0.6V * that varies the threshold voltage +-3 sigma around a mean of +-0.6V
*.model p1 PMOS version=3.3.0 Level=8 Vth0=agauss(-0.6, 0.1, 3)
*.model n1 NMOS version=3.3.0 Level=8 Vth0=agauss(0.6, 0.1, 3)
.model p1 PMOS version=3.3.0 Level=8 Vth0=agauss(-0.6, 0.1, 3)
.model n1 NMOS version=3.3.0 Level=8 Vth0=agauss(0.6, 0.1, 3)
.control .control
let mc_runs = 10 $ number of runs for monte carlo let mc_runs = 10 $ number of runs for monte carlo

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