|
|
@ -16,13 +16,12 @@ Author: 1987 Kanwar Jit Singh |
|
|
/*ARGSUSED*/ |
|
|
/*ARGSUSED*/ |
|
|
int |
|
|
int |
|
|
ASRCsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states) |
|
|
ASRCsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states) |
|
|
/* load the voltage source structure with those |
|
|
|
|
|
* pointers needed later for fast matrix loading |
|
|
|
|
|
*/ |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* load the voltage source structure with those |
|
|
|
|
|
* pointers needed later for fast matrix loading |
|
|
|
|
|
*/ |
|
|
{ |
|
|
{ |
|
|
ASRCinstance *here; |
|
|
ASRCinstance *here; |
|
|
ASRCmodel *model = (ASRCmodel*)inModel; |
|
|
|
|
|
|
|
|
ASRCmodel *model = (ASRCmodel*) inModel; |
|
|
int error, i, j; |
|
|
int error, i, j; |
|
|
int v_first; |
|
|
int v_first; |
|
|
CKTnode *tmp; |
|
|
CKTnode *tmp; |
|
|
@ -30,103 +29,103 @@ ASRCsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states) |
|
|
NG_IGNORE(states); |
|
|
NG_IGNORE(states); |
|
|
|
|
|
|
|
|
/* loop through all the user models*/ |
|
|
/* loop through all the user models*/ |
|
|
for( ; model != NULL; model = model->ASRCnextModel ) { |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
for (; model != NULL; model = model->ASRCnextModel) { |
|
|
/* loop through all the instances of the model */ |
|
|
/* loop through all the instances of the model */ |
|
|
for (here = model->ASRCinstances; here != NULL ; |
|
|
|
|
|
here=here->ASRCnextInstance) { |
|
|
|
|
|
|
|
|
|
|
|
if(!here->ASRCtc1Given) here->ASRCtc1 = 0.0; |
|
|
|
|
|
if(!here->ASRCtc2Given) here->ASRCtc2 = 0.0; |
|
|
|
|
|
if(!here->ASRCreciproctcGiven) here->ASRCreciproctc = 0; |
|
|
|
|
|
|
|
|
for (here = model->ASRCinstances; here != NULL; |
|
|
|
|
|
here=here->ASRCnextInstance) { |
|
|
|
|
|
|
|
|
|
|
|
if (!here->ASRCtc1Given) here->ASRCtc1 = 0.0; |
|
|
|
|
|
if (!here->ASRCtc2Given) here->ASRCtc2 = 0.0; |
|
|
|
|
|
if (!here->ASRCreciproctcGiven) here->ASRCreciproctc = 0; |
|
|
|
|
|
|
|
|
here->ASRCposptr = NULL; |
|
|
here->ASRCposptr = NULL; |
|
|
j=0; /*strchr of the array holding ptrs to SMP */ |
|
|
|
|
|
|
|
|
j = 0; /* strchr of the array holding ptrs to SMP */ |
|
|
v_first = 1; |
|
|
v_first = 1; |
|
|
if( here->ASRCtype == ASRC_VOLTAGE){ |
|
|
|
|
|
if(here->ASRCbranch==0) { |
|
|
|
|
|
error = CKTmkCur(ckt,&tmp,here->ASRCname,"branch"); |
|
|
|
|
|
if(error) return(error); |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
if (here->ASRCtype == ASRC_VOLTAGE) { |
|
|
|
|
|
if (here->ASRCbranch == 0) { |
|
|
|
|
|
error = CKTmkCur(ckt, &tmp, here->ASRCname, "branch"); |
|
|
|
|
|
if (error) return(error); |
|
|
here->ASRCbranch = tmp->number; |
|
|
here->ASRCbranch = tmp->number; |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* macro to make elements with built in test for out of memory */ |
|
|
/* macro to make elements with built in test for out of memory */ |
|
|
#define TSTALLOC(ptr,first,second) \ |
|
|
|
|
|
do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\ |
|
|
|
|
|
return(E_NOMEM);\ |
|
|
|
|
|
} } while(0) |
|
|
|
|
|
|
|
|
#define TSTALLOC(ptr, first, second) \ |
|
|
|
|
|
do { if ((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL) { \ |
|
|
|
|
|
return(E_NOMEM); \ |
|
|
|
|
|
} } while(0) |
|
|
|
|
|
|
|
|
#define MY_TSTALLOC(ptr,first,second) \ |
|
|
|
|
|
do { if((here->ptr = SMPmakeElt(matrix, here->first, (second)->number)) == NULL){\ |
|
|
|
|
|
return(E_NOMEM);\ |
|
|
|
|
|
} } while(0) |
|
|
|
|
|
|
|
|
#define MY_TSTALLOC(ptr, first, second) \ |
|
|
|
|
|
do { if ((here->ptr = SMPmakeElt(matrix, here->first, (second)->number)) == NULL) { \ |
|
|
|
|
|
return(E_NOMEM); \ |
|
|
|
|
|
} } while(0) |
|
|
|
|
|
|
|
|
/* For each controlling variable set the entries |
|
|
/* For each controlling variable set the entries |
|
|
in the vector of the positions of the SMP */ |
|
|
|
|
|
|
|
|
in the vector of the positions of the SMP */ |
|
|
if (!here->ASRCtree) |
|
|
if (!here->ASRCtree) |
|
|
return E_PARMVAL; |
|
|
|
|
|
|
|
|
return E_PARMVAL; |
|
|
|
|
|
|
|
|
if( here->ASRCtype == ASRC_VOLTAGE) { |
|
|
|
|
|
|
|
|
if (here->ASRCtype == ASRC_VOLTAGE) { |
|
|
|
|
|
|
|
|
if(here->ASRCposNode == here->ASRCnegNode) { |
|
|
|
|
|
SPfrontEnd->IFerrorf (ERR_FATAL, |
|
|
|
|
|
"instance %s is a shorted ASRC", here->ASRCname); |
|
|
|
|
|
|
|
|
if (here->ASRCposNode == here->ASRCnegNode) { |
|
|
|
|
|
SPfrontEnd->IFerrorf(ERR_FATAL, |
|
|
|
|
|
"instance %s is a shorted ASRC", here->ASRCname); |
|
|
return(E_UNSUPP); |
|
|
return(E_UNSUPP); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 5); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++],ASRCposNode,ASRCbranch); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++],ASRCnegNode,ASRCbranch); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++],ASRCbranch,ASRCnegNode); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++],ASRCbranch,ASRCposNode); |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
for( i=0; i < here->ASRCtree->numVars; i++){ |
|
|
|
|
|
switch(here->ASRCtree->varTypes[i]){ |
|
|
|
|
|
|
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 5); |
|
|
|
|
|
|
|
|
|
|
|
TSTALLOC(ASRCposptr[j++], ASRCposNode, ASRCbranch); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++], ASRCnegNode, ASRCbranch); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++], ASRCbranch, ASRCnegNode); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++], ASRCbranch, ASRCposNode); |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < here->ASRCtree->numVars; i++) { |
|
|
|
|
|
switch (here->ASRCtree->varTypes[i]) { |
|
|
case IF_INSTANCE: |
|
|
case IF_INSTANCE: |
|
|
here->ASRCcont_br = CKTfndBranch(ckt, |
|
|
here->ASRCcont_br = CKTfndBranch(ckt, |
|
|
here->ASRCtree->vars[i].uValue); |
|
|
|
|
|
if(here->ASRCcont_br == 0) { |
|
|
|
|
|
|
|
|
here->ASRCtree->vars[i].uValue); |
|
|
|
|
|
if (here->ASRCcont_br == 0) { |
|
|
SPfrontEnd->IFerrorf (ERR_FATAL, |
|
|
SPfrontEnd->IFerrorf (ERR_FATAL, |
|
|
"%s: unknown controlling source %s", here->ASRCname, here->ASRCtree->vars[i].uValue); |
|
|
|
|
|
|
|
|
"%s: unknown controlling source %s", here->ASRCname, here->ASRCtree->vars[i].uValue); |
|
|
return(E_BADPARM); |
|
|
return(E_BADPARM); |
|
|
} |
|
|
} |
|
|
if( here->ASRCtype == ASRC_VOLTAGE){ |
|
|
|
|
|
|
|
|
if (here->ASRCtype == ASRC_VOLTAGE) { |
|
|
/* CCVS */ |
|
|
/* CCVS */ |
|
|
if(v_first){ |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++],ASRCbranch,ASRCcont_br); |
|
|
|
|
|
|
|
|
if (v_first) { |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++], ASRCbranch, ASRCcont_br); |
|
|
v_first = 0; |
|
|
v_first = 0; |
|
|
} else{ |
|
|
|
|
|
|
|
|
} else { |
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 1); |
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 1); |
|
|
TSTALLOC(ASRCposptr[j++],ASRCbranch,ASRCcont_br); |
|
|
|
|
|
|
|
|
TSTALLOC(ASRCposptr[j++], ASRCbranch, ASRCcont_br); |
|
|
} |
|
|
} |
|
|
} else if(here->ASRCtype == ASRC_CURRENT){ |
|
|
|
|
|
|
|
|
} else if (here->ASRCtype == ASRC_CURRENT) { |
|
|
/* CCCS */ |
|
|
/* CCCS */ |
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 2); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++],ASRCposNode,ASRCcont_br); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++],ASRCnegNode,ASRCcont_br); |
|
|
|
|
|
} else{ |
|
|
|
|
|
|
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 2); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++], ASRCposNode, ASRCcont_br); |
|
|
|
|
|
TSTALLOC(ASRCposptr[j++], ASRCnegNode, ASRCcont_br); |
|
|
|
|
|
} else { |
|
|
return (E_BADPARM); |
|
|
return (E_BADPARM); |
|
|
} |
|
|
} |
|
|
break; |
|
|
break; |
|
|
case IF_NODE: |
|
|
case IF_NODE: |
|
|
if( here->ASRCtype == ASRC_VOLTAGE){ |
|
|
|
|
|
|
|
|
if (here->ASRCtype == ASRC_VOLTAGE) { |
|
|
/* VCVS */ |
|
|
/* VCVS */ |
|
|
if(v_first){ |
|
|
|
|
|
MY_TSTALLOC(ASRCposptr[j++],ASRCbranch,here->ASRCtree->vars[i].nValue); |
|
|
|
|
|
|
|
|
if (v_first) { |
|
|
|
|
|
MY_TSTALLOC(ASRCposptr[j++], ASRCbranch, here->ASRCtree->vars[i].nValue); |
|
|
v_first = 0; |
|
|
v_first = 0; |
|
|
} else{ |
|
|
|
|
|
|
|
|
} else { |
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 1); |
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 1); |
|
|
MY_TSTALLOC(ASRCposptr[j++],ASRCbranch,here->ASRCtree->vars[i].nValue); |
|
|
|
|
|
|
|
|
MY_TSTALLOC(ASRCposptr[j++], ASRCbranch, here->ASRCtree->vars[i].nValue); |
|
|
} |
|
|
} |
|
|
} else if(here->ASRCtype == ASRC_CURRENT){ |
|
|
|
|
|
|
|
|
} else if (here->ASRCtype == ASRC_CURRENT) { |
|
|
/* VCCS */ |
|
|
/* VCCS */ |
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 2); |
|
|
here->ASRCposptr = TREALLOC(double *, here->ASRCposptr, j + 2); |
|
|
MY_TSTALLOC(ASRCposptr[j++],ASRCposNode,here->ASRCtree->vars[i].nValue); |
|
|
|
|
|
MY_TSTALLOC(ASRCposptr[j++],ASRCnegNode,here->ASRCtree->vars[i].nValue); |
|
|
|
|
|
} else{ |
|
|
|
|
|
|
|
|
MY_TSTALLOC(ASRCposptr[j++], ASRCposNode, here->ASRCtree->vars[i].nValue); |
|
|
|
|
|
MY_TSTALLOC(ASRCposptr[j++], ASRCnegNode, here->ASRCtree->vars[i].nValue); |
|
|
|
|
|
} else { |
|
|
return (E_BADPARM); |
|
|
return (E_BADPARM); |
|
|
} |
|
|
} |
|
|
break; |
|
|
break; |
|
|
@ -136,9 +135,11 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, (second)->number)) == NULL) |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
return(OK); |
|
|
return(OK); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
int |
|
|
int |
|
|
ASRCunsetup( |
|
|
ASRCunsetup( |
|
|
GENmodel *inModel, |
|
|
GENmodel *inModel, |
|
|
@ -147,17 +148,18 @@ ASRCunsetup( |
|
|
ASRCmodel *model; |
|
|
ASRCmodel *model; |
|
|
ASRCinstance *here; |
|
|
ASRCinstance *here; |
|
|
|
|
|
|
|
|
for (model = (ASRCmodel *)inModel; model != NULL; |
|
|
|
|
|
model = model->ASRCnextModel) |
|
|
|
|
|
|
|
|
for (model = (ASRCmodel *) inModel; model != NULL; |
|
|
|
|
|
model = model->ASRCnextModel) |
|
|
{ |
|
|
{ |
|
|
for (here = model->ASRCinstances; here != NULL; |
|
|
for (here = model->ASRCinstances; here != NULL; |
|
|
here=here->ASRCnextInstance) |
|
|
|
|
|
{ |
|
|
|
|
|
if (here->ASRCbranch) { |
|
|
|
|
|
CKTdltNNum(ckt, here->ASRCbranch); |
|
|
|
|
|
here->ASRCbranch = 0; |
|
|
|
|
|
} |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
here = here->ASRCnextInstance) |
|
|
|
|
|
{ |
|
|
|
|
|
if (here->ASRCbranch) { |
|
|
|
|
|
CKTdltNNum(ckt, here->ASRCbranch); |
|
|
|
|
|
here->ASRCbranch = 0; |
|
|
|
|
|
} |
|
|
|
|
|
} |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
return OK; |
|
|
return OK; |
|
|
} |
|
|
} |