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jfet model temperature extension, tcv and bex parameter

pre-master-46
dwarning 14 years ago
parent
commit
0f2794267c
  1. 6
      src/spicelib/devices/jfet/jfet.c
  2. 10
      src/spicelib/devices/jfet/jfetdefs.h
  3. 4
      src/spicelib/devices/jfet/jfetdset.c
  4. 45
      src/spicelib/devices/jfet/jfetload.c
  5. 6
      src/spicelib/devices/jfet/jfetmask.c
  6. 8
      src/spicelib/devices/jfet/jfetmpar.c
  7. 7
      src/spicelib/devices/jfet/jfetset.c
  8. 17
      src/spicelib/devices/jfet/jfettemp.c

6
src/spicelib/devices/jfet/jfet.c

@ -67,8 +67,10 @@ IFparm JFETmPTable[] = { /* model parameters */
IOP("b", JFET_MOD_B, IF_REAL,"Doping tail parameter"),
/* end Sydney University mod. */
IOPU("tnom", JFET_MOD_TNOM, IF_REAL,"parameter measurement temperature"),
IOP("kf", JFET_MOD_KF,IF_REAL,"Flicker Noise Coefficient"),
IOP("af", JFET_MOD_AF,IF_REAL,"Flicker Noise Exponent")
IOP("kf", JFET_MOD_KF, IF_REAL, "Flicker Noise Coefficient"),
IOP("af", JFET_MOD_AF, IF_REAL, "Flicker Noise Exponent"),
IOP("tcv", JFET_MOD_TCV, IF_REAL, "Threshold voltage temperature coefficient"),
IOP("bex", JFET_MOD_BEX, IF_REAL, "Mobility temperature exponent")
};

10
src/spicelib/devices/jfet/jfetdefs.h

@ -146,7 +146,8 @@ typedef struct sJFETinstance {
double JFETcorDepCap; /* joining point of the fwd bias dep. cap eq.s */
double JFETvcrit; /* critical voltage for the instance */
double JFETf1; /* coefficient of capacitance polynomial exp */
double JFETtThreshold; /* temperature adjusted threshold voltage */
double JFETtBeta; /* temperature adjusted beta */
} JFETinstance ;
@ -198,6 +199,8 @@ typedef struct sJFETmodel { /* model structure for a jfet */
double JFETbFac; /* internal derived doping profile parameter */
/* end Sydney University mod */
double JFETtnom; /* temperature at which parameters were measured */
double JFETtcv;
double JFETbex;
unsigned JFETthresholdGiven : 1;
unsigned JFETbetaGiven : 1;
@ -215,7 +218,8 @@ typedef struct sJFETmodel { /* model structure for a jfet */
unsigned JFETtnomGiven : 1; /* user specified Tnom for model */
unsigned JFETfNcoefGiven : 1;
unsigned JFETfNexpGiven : 1;
unsigned JFETtcvGiven : 1;
unsigned JFETbexGiven : 1;
} JFETmodel;
@ -255,6 +259,8 @@ typedef struct sJFETmodel { /* model structure for a jfet */
/* Modification for Sydney University JFET model */
#define JFET_MOD_B 116
/* end Sydney University mod */
#define JFET_MOD_TCV 117
#define JFET_MOD_BEX 118
/* device questions */
#define JFET_DRAINNODE 301

4
src/spicelib/devices/jfet/jfetdset.c

@ -77,7 +77,7 @@ JFETdSetup(GENmodel *inModel, CKTcircuit *ckt)
/*
* dc model parameters
*/
beta = model->JFETbeta * here->JFETarea * here->JFETm;
beta = here->JFETtBeta * here->JFETarea * here->JFETm;
gdpr=model->JFETdrainConduct*here->JFETarea * here->JFETm;
gspr=model->JFETsourceConduct*here->JFETarea * here-> JFETm;
csat=here->JFETtSatCur*here->JFETarea * here-> JFETm;
@ -130,7 +130,7 @@ JFETdSetup(GENmodel *inModel, CKTcircuit *ckt)
/*
* compute drain current and derivatives
*/
vgst=vgs-model->JFETthreshold;
vgst=vgs-here->JFETtThreshold;
/*
* cutoff region
*/

45
src/spicelib/devices/jfet/jfetload.c

@ -3,8 +3,8 @@ Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1985 Thomas L. Quarles
Modified: 2000 AlansFixes
Sydney University mods Copyright(c) 1989 Anthony E. Parker, David J. Skellern
Laboratory for Communication Science Engineering
Sydney University Department of Electrical Engineering, Australia
Laboratory for Communication Science Engineering
Sydney University Department of Electrical Engineering, Australia
**********/
#include "ngspice/ngspice.h"
@ -89,7 +89,7 @@ JFETload(GENmodel *inModel, CKTcircuit *ckt)
/*
* dc model parameters
*/
beta = model->JFETbeta * here->JFETarea;
beta = here->JFETtBeta * here->JFETarea;
gdpr=model->JFETdrainConduct*here->JFETarea;
gspr=model->JFETsourceConduct*here->JFETarea;
csat=here->JFETtSatCur*here->JFETarea;
@ -177,13 +177,14 @@ JFETload(GENmodel *inModel, CKTcircuit *ckt)
(fabs(delvgs) < ckt->CKTreltol*MAX(fabs(vgs),
fabs(*(ckt->CKTstate0 + here->JFETvgs)))+
ckt->CKTvoltTol) )
if ( (fabs(delvgd) < ckt->CKTreltol*MAX(fabs(vgd),
if ( (fabs(delvgd) < ckt->CKTreltol*MAX(fabs(vgd),
fabs(*(ckt->CKTstate0 + here->JFETvgd)))+
ckt->CKTvoltTol))
if ( (fabs(cghat-*(ckt->CKTstate0 + here->JFETcg))
if ( (fabs(cghat-*(ckt->CKTstate0 + here->JFETcg))
< ckt->CKTreltol*MAX(fabs(cghat),
fabs(*(ckt->CKTstate0 + here->JFETcg)))+
ckt->CKTabstol) ) if ( /* hack - expression too big */
ckt->CKTabstol) )
if ( /* hack - expression too big */
(fabs(cdhat-*(ckt->CKTstate0 + here->JFETcd))
< ckt->CKTreltol*MAX(fabs(cdhat),
fabs(*(ckt->CKTstate0 + here->JFETcd)))+
@ -214,9 +215,9 @@ JFETload(GENmodel *inModel, CKTcircuit *ckt)
icheck=1;
}
vgs = DEVfetlim(vgs,*(ckt->CKTstate0 + here->JFETvgs),
model->JFETthreshold);
here->JFETtThreshold);
vgd = DEVfetlim(vgd,*(ckt->CKTstate0 + here->JFETvgd),
model->JFETthreshold);
here->JFETtThreshold);
}
/*
* determine dc current and derivatives
@ -248,8 +249,8 @@ JFETload(GENmodel *inModel, CKTcircuit *ckt)
cg = cg+cgd;
/* Modification for Sydney University JFET model */
vto = model->JFETthreshold;
/* Modification for Sydney University JFET model */
vto = here->JFETtThreshold;
if (vds >= 0) {
vgst = vgs - vto;
/*
@ -325,13 +326,13 @@ JFETload(GENmodel *inModel, CKTcircuit *ckt)
}
#ifdef notdef
/* The original section is now commented out */
/* end Sydney University mod */
/* The original section is now commented out */
/* end Sydney University mod */
/*
* compute drain current and derivitives for normal mode
*/
if (vds >= 0) {
vgst=vgs-model->JFETthreshold;
vgst=vgs-here->JFETtThreshold;
/*
* normal mode, cutoff region
*/
@ -363,7 +364,7 @@ JFETload(GENmodel *inModel, CKTcircuit *ckt)
/*
* compute drain current and derivitives for inverse mode
*/
vgdt=vgd-model->JFETthreshold;
vgdt=vgd-here->JFETtThreshold;
if (vgdt <= 0) {
/*
* inverse mode, cutoff region
@ -392,7 +393,7 @@ JFETload(GENmodel *inModel, CKTcircuit *ckt)
}
}
}
/* end of original section, now deleted (replaced w/SU mod */
/* end of original section, now deleted (replaced w/SU mod */
#endif
/*
@ -473,14 +474,14 @@ JFETload(GENmodel *inModel, CKTcircuit *ckt)
* check convergence
*/
if( (!(ckt->CKTmode & MODEINITFIX)) |
(!(ckt->CKTmode & MODEUIC))) {
if((icheck == 1) ||
(fabs(cghat-cg) >= ckt->CKTreltol *
MAX(fabs(cghat), fabs(cg)) + ckt->CKTabstol) ||
(fabs(cdhat-cd) > ckt->CKTreltol *
MAX(fabs(cdhat), fabs(cd)) + ckt->CKTabstol)) {
(!(ckt->CKTmode & MODEUIC))) {
if((icheck == 1) ||
(fabs(cghat-cg) >= ckt->CKTreltol *
MAX(fabs(cghat), fabs(cg)) + ckt->CKTabstol) ||
(fabs(cdhat-cd) > ckt->CKTreltol *
MAX(fabs(cdhat), fabs(cd)) + ckt->CKTabstol)) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
ckt->CKTtroubleElt = (GENinstance *) here;
}
}
*(ckt->CKTstate0 + here->JFETvgs) = vgs;

6
src/spicelib/devices/jfet/jfetmask.c

@ -77,6 +77,12 @@ JFETmAsk(CKTcircuit *ckt, GENmodel *inModel, int which, IFvalue *value)
case JFET_MOD_AF:
value->rValue = model->JFETfNexp;
return(OK);
case JFET_MOD_TCV:
value->rValue = model->JFETtcv;
return(OK);
case JFET_MOD_BEX:
value->rValue = model->JFETbex;
return(OK);
case JFET_MOD_TYPE:
if (model->JFETtype == NJF)
value->sValue = "njf";

8
src/spicelib/devices/jfet/jfetmpar.c

@ -86,6 +86,14 @@ JFETmParam(int param, IFvalue *value, GENmodel *inModels)
model->JFETb = value->rValue;
return(OK);
/* end Sydney University mod */
case JFET_MOD_TCV:
model->JFETtcvGiven = TRUE;
model->JFETtcv = value->rValue;
break;
case JFET_MOD_BEX:
model->JFETbexGiven = TRUE;
model->JFETbex = value->rValue;
break;
default:
return(E_BADPARM);
}

7
src/spicelib/devices/jfet/jfetset.c

@ -75,6 +75,13 @@ JFETsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
}
/* end Sydney University mod */
if(!model->JFETtcvGiven) {
model->JFETtcv = 0.0;
}
if(!model->JFETbexGiven) {
model->JFETbex = 0.0;
}
if(model->JFETdrainResist != 0) {
model->JFETdrainConduct = 1/model->JFETdrainResist;
} else {

17
src/spicelib/devices/jfet/jfettemp.c

@ -2,8 +2,8 @@
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1985 Thomas L. Quarles
Sydney University mods Copyright(c) 1989 Anthony E. Parker, David J. Skellern
Laboratory for Communication Science Engineering
Sydney University Department of Electrical Engineering, Australia
Laboratory for Communication Science Engineering
Sydney University Department of Electrical Engineering, Australia
**********/
#include "ngspice/ngspice.h"
@ -71,10 +71,10 @@ JFETtemp(GENmodel *inModel, CKTcircuit *ckt)
xfc = log(1 - model->JFETdepletionCapCoeff);
model->JFETf2 = exp((1+.5)*xfc);
model->JFETf3 = 1 - model->JFETdepletionCapCoeff * (1 + .5);
/* Modification for Sydney University JFET model */
model->JFETbFac = (1 - model->JFETb)
/ (model->JFETgatePotential - model->JFETthreshold);
/* end Sydney University mod */
/* Modification for Sydney University JFET model */
model->JFETbFac = (1 - model->JFETb)
/ (model->JFETgatePotential - model->JFETthreshold);
/* end Sydney University mod */
/* loop through all the instances of the model */
for (here = model->JFETinstances; here != NULL ;
@ -107,7 +107,10 @@ JFETtemp(GENmodel *inModel, CKTcircuit *ckt)
here->JFETtGatePot;
here->JFETf1 = here->JFETtGatePot * (1 - exp((1-.5)*xfc))/(1-.5);
here->JFETvcrit = vt * log(vt/(CONSTroot2 * here->JFETtSatCur));
here->JFETtThreshold = model->JFETthreshold - model->JFETtcv*(here->JFETtemp-model->JFETtnom);
here->JFETtBeta = model->JFETbeta * pow(here->JFETtemp/model->JFETtnom,model->JFETbex);
}
}
return(OK);

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