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more on removing the sidewall capacitance

pre-master-46
Holger Vogt 8 years ago
committed by rlar
parent
commit
0a213bea1a
  1. 2
      src/spicelib/devices/vdmos/vdmosdefs.h
  2. 10
      src/spicelib/devices/vdmos/vdmosload.c
  3. 15
      src/spicelib/devices/vdmos/vdmostemp.c

2
src/spicelib/devices/vdmos/vdmosdefs.h

@ -88,9 +88,7 @@ typedef struct sVDMOSinstance {
double VDMOScapbd;
double VDMOScapbs;
double VDMOSCbd;
double VDMOSCbdsw;
double VDMOSCbs;
double VDMOSCbssw;
double VDMOSf2d;
double VDMOSf3d;
double VDMOSf4d;

10
src/spicelib/devices/vdmos/vdmosload.c

@ -483,7 +483,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
*/
{
/* can't bypass the diode capacitance calculations */
if (here->VDMOSCbs != 0 || here->VDMOSCbssw != 0) {
if (here->VDMOSCbs != 0) {
if (vbs < here->VDMOStDepCap) {
arg = 1 - vbs / here->VDMOStBulkPot;
/*
@ -504,8 +504,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
*(ckt->CKTstate0 + here->VDMOSqbs) =
here->VDMOStBulkPot*(here->VDMOSCbs*
(1 - arg*sarg) / (1 - model->VDMOSbulkJctBotGradingCoeff));
here->VDMOScapbs = here->VDMOSCbs*sarg +
here->VDMOSCbssw*sargsw;
here->VDMOScapbs = here->VDMOSCbs * sarg;
}
else {
*(ckt->CKTstate0 + here->VDMOSqbs) = here->VDMOSf4s +
@ -519,7 +518,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
}
}
{
if (here->VDMOSCbd != 0 || here->VDMOSCbdsw != 0) {
if (here->VDMOSCbd != 0) {
if (vbd < here->VDMOStDepCap) {
arg = 1 - vbd / here->VDMOStBulkPot;
/*
@ -545,8 +544,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
here->VDMOStBulkPot*(here->VDMOSCbd*
(1 - arg*sarg)
/ (1 - model->VDMOSbulkJctBotGradingCoeff));
here->VDMOScapbd = here->VDMOSCbd*sarg +
here->VDMOSCbdsw*sargsw;
here->VDMOScapbd = here->VDMOSCbd * sarg;
}
else {
*(ckt->CKTstate0 + here->VDMOSqbd) = here->VDMOSf4d +

15
src/spicelib/devices/vdmos/vdmostemp.c

@ -117,12 +117,9 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
for(here = VDMOSinstances(model); here!= NULL;
here = VDMOSnextInstance(here)) {
double czbd; /* zero voltage bulk-drain capacitance */
double czbdsw; /* zero voltage bulk-drain sidewall capacitance */
double czbs; /* zero voltage bulk-source capacitance */
double czbssw; /* zero voltage bulk-source sidewall capacitance */
double arg; /* 1 - fc */
double sarg; /* (1-fc) ^^ (-mj) */
double sargsw; /* (1-fc) ^^ (-mjsw) */
/* perform the parameter defaulting */
@ -187,16 +184,10 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
vt*log(vt/(CONSTroot2*here->VDMOSm*here->VDMOStSatCur));
}
if(model->VDMOScapBDGiven) {
czbd = here->VDMOStCbd * here->VDMOSm;
} else {
czbd=0;
}
czbdsw=0;
arg = 1-model->VDMOSfwdCapDepCoeff;
sarg = exp( (-model->VDMOSbulkJctBotGradingCoeff) * log(arg) );
here->VDMOSCbd = czbd;
here->VDMOSCbdsw = czbdsw;
here->VDMOSf2d = czbd * (1 - model->VDMOSfwdCapDepCoeff *
(1 + model->VDMOSbulkJctBotGradingCoeff)) * sarg / arg;
here->VDMOSf3d = czbd * model->VDMOSbulkJctBotGradingCoeff * sarg / arg /
@ -206,16 +197,10 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
-here->VDMOSf3d/2*
(here->VDMOStDepCap*here->VDMOStDepCap)
-here->VDMOStDepCap * here->VDMOSf2d;
if(model->VDMOScapBSGiven) {
czbs=here->VDMOStCbs * here->VDMOSm;
} else {
czbs=0;
}
czbssw=0;
arg = 1-model->VDMOSfwdCapDepCoeff;
sarg = exp( (-model->VDMOSbulkJctBotGradingCoeff) * log(arg) );
here->VDMOSCbs = czbs;
here->VDMOSCbssw = czbssw;
here->VDMOSf2s = czbs * (1 - model->VDMOSfwdCapDepCoeff *
(1 + model->VDMOSbulkJctBotGradingCoeff)) * sarg / arg;
here->VDMOSf3s = czbs * model->VDMOSbulkJctBotGradingCoeff * sarg / arg /

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