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pre-master-46
dwarning 8 years ago
parent
06fb917b82
commit
06d0aaa827
9 changed files with 4224 additions and 4224 deletions
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  1. 292
      src/spicelib/devices/bsim2/b2temp.c
  2. 934
      src/spicelib/devices/bsim3soi_dd/b3soiddtemp.c
  3. 932
      src/spicelib/devices/bsim3soi_fd/b3soifdtemp.c
  4. 1042
      src/spicelib/devices/bsim3soi_pd/b3soipdtemp.c
  5. 858
      src/spicelib/devices/bsim3v0/b3v0temp.c
  6. 926
      src/spicelib/devices/bsim3v1/b3v1temp.c
  7. 12
      src/spicelib/devices/bsim4/b4temp.c
  8. 1440
      src/spicelib/devices/bsim4v5/b4v5temp.c
  9. 2012
      src/spicelib/devices/bsim4v6/b4v6temp.c

292
src/spicelib/devices/bsim2/b2temp.c
View File

@ -14,8 +14,8 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
/* ARGSUSED */
int
B2temp(GENmodel *inModel, CKTcircuit *ckt)
/* load the B2 device structure with those pointers needed later
* for fast matrix loading
/* load the B2 device structure with those pointers needed later
* for fast matrix loading
*/
{
@ -31,7 +31,7 @@ B2temp(GENmodel *inModel, CKTcircuit *ckt)
/* loop through all the B2 device models */
for( ; model != NULL; model = B2nextModel(model)) {
/* Default value Processing for B2 MOSFET Models */
/* Some Limiting for Model Parameters */
if( model->B2bulkJctPotential < 0.1) {
@ -42,10 +42,10 @@ B2temp(GENmodel *inModel, CKTcircuit *ckt)
}
model->B2Cox = 3.453e-13/(model->B2tox * 1.0e-4);/*in F/cm**2 */
model->B2vdd2 = 2.0 * model->B2vdd;
model->B2vgg2 = 2.0 * model->B2vgg;
model->B2vbb2 = 2.0 * model->B2vbb;
model->B2Vtm = 8.625e-5 * (model->B2temp + 273.0);
model->B2vdd2 = 2.0 * model->B2vdd;
model->B2vgg2 = 2.0 * model->B2vgg;
model->B2vbb2 = 2.0 * model->B2vbb;
model->B2Vtm = 8.625e-5 * (model->B2temp + 273.0);
struct bsim2SizeDependParam *p = model->pSizeDependParamKnot;
while (p) {
@ -53,41 +53,41 @@ B2temp(GENmodel *inModel, CKTcircuit *ckt)
FREE(p);
p = next_p;
}
model->pSizeDependParamKnot = NULL;
pLastKnot = NULL;
model->pSizeDependParamKnot = NULL;
pLastKnot = NULL;
/* loop through all the instances of the model */
for (here = B2instances(model); here != NULL ;
here=B2nextInstance(here)) {
pSizeDependParamKnot = model->pSizeDependParamKnot;
Size_Not_Found = 1;
pSizeDependParamKnot = model->pSizeDependParamKnot;
Size_Not_Found = 1;
while ((pSizeDependParamKnot != NULL) && Size_Not_Found)
{ if ((here->B2l == pSizeDependParamKnot->Length)
&& (here->B2w == pSizeDependParamKnot->Width))
while ((pSizeDependParamKnot != NULL) && Size_Not_Found)
{ if ((here->B2l == pSizeDependParamKnot->Length)
&& (here->B2w == pSizeDependParamKnot->Width))
{ Size_Not_Found = 0;
here->pParam = pSizeDependParamKnot;
}
else
{ pLastKnot = pSizeDependParamKnot;
pSizeDependParamKnot = pSizeDependParamKnot->pNext;
}
here->pParam = pSizeDependParamKnot;
}
else
{ pLastKnot = pSizeDependParamKnot;
pSizeDependParamKnot = pSizeDependParamKnot->pNext;
}
}
if (Size_Not_Found)
{ here->pParam = TMALLOC(struct bsim2SizeDependParam, 1);
if (Size_Not_Found)
{ here->pParam = TMALLOC(struct bsim2SizeDependParam, 1);
if (pLastKnot == NULL)
model->pSizeDependParamKnot = here->pParam;
model->pSizeDependParamKnot = here->pParam;
else
pLastKnot->pNext = here->pParam;
pLastKnot->pNext = here->pParam;
here->pParam->pNext = NULL;
EffectiveLength = here->B2l - model->B2deltaL * 1.0e-6;
EffectiveWidth = here->B2w - model->B2deltaW * 1.0e-6;
EffectiveLength = here->B2l - model->B2deltaL * 1.0e-6;
EffectiveWidth = here->B2w - model->B2deltaW * 1.0e-6;
if(EffectiveLength<=0)
{
{
SPfrontEnd->IFerrorf (ERR_FATAL,
"B2: mosfet %s, model %s: Effective channel length <=0",
model->B2modName, here->B2name);
@ -95,152 +95,152 @@ B2temp(GENmodel *inModel, CKTcircuit *ckt)
}
if(EffectiveWidth <= 0)
{
{
SPfrontEnd->IFerrorf (ERR_FATAL,
"B2: mosfet %s, model %s: Effective channel width <=0",
model->B2modName, here->B2name);
return(E_BADPARM);
}
Inv_L = 1.0e-6 / EffectiveLength;
Inv_W = 1.0e-6 / EffectiveWidth;
here->pParam->Width = here->B2w;
here->pParam->Length = here->B2l;
Inv_L = 1.0e-6 / EffectiveLength;
Inv_W = 1.0e-6 / EffectiveWidth;
here->pParam->Width = here->B2w;
here->pParam->Length = here->B2l;
here->pParam->B2vfb = model->B2vfb0 + model->B2vfbW * Inv_W
+ model->B2vfbL * Inv_L;
+ model->B2vfbL * Inv_L;
here->pParam->B2phi = model->B2phi0 + model->B2phiW * Inv_W
+ model->B2phiL * Inv_L;
+ model->B2phiL * Inv_L;
here->pParam->B2k1 = model->B2k10 + model->B2k1W * Inv_W
+ model->B2k1L * Inv_L;
+ model->B2k1L * Inv_L;
here->pParam->B2k2 = model->B2k20 + model->B2k2W * Inv_W
+ model->B2k2L * Inv_L;
here->pParam->B2eta0 = model->B2eta00
+ model->B2eta0W * Inv_W
+ model->B2eta0L * Inv_L;
here->pParam->B2etaB = model->B2etaB0 + model->B2etaBW
* Inv_W + model->B2etaBL * Inv_L;
+ model->B2k2L * Inv_L;
here->pParam->B2eta0 = model->B2eta00
+ model->B2eta0W * Inv_W
+ model->B2eta0L * Inv_L;
here->pParam->B2etaB = model->B2etaB0 + model->B2etaBW
* Inv_W + model->B2etaBL * Inv_L;
here->pParam->B2beta0 = model->B2mob00;
here->pParam->B2beta0B = model->B2mob0B0
+ model->B2mob0BW * Inv_W
+ model->B2mob0BL * Inv_L;
here->pParam->B2betas0 = model->B2mobs00
+ model->B2mobs0W * Inv_W
+ model->B2mobs0L * Inv_L;
here->pParam->B2beta0B = model->B2mob0B0
+ model->B2mob0BW * Inv_W
+ model->B2mob0BL * Inv_L;
here->pParam->B2betas0 = model->B2mobs00
+ model->B2mobs0W * Inv_W
+ model->B2mobs0L * Inv_L;
if (here->pParam->B2betas0 < 1.01 * here->pParam->B2beta0)
here->pParam->B2betas0 = 1.01 * here->pParam->B2beta0;
here->pParam->B2betasB = model->B2mobsB0
+ model->B2mobsBW * Inv_W
+ model->B2mobsBL * Inv_L;
here->pParam->B2betas0 = 1.01 * here->pParam->B2beta0;
here->pParam->B2betasB = model->B2mobsB0
+ model->B2mobsBW * Inv_W
+ model->B2mobsBL * Inv_L;
tmp = (here->pParam->B2betas0 - here->pParam->B2beta0
- here->pParam->B2beta0B * model->B2vbb);
- here->pParam->B2beta0B * model->B2vbb);
if ((-here->pParam->B2betasB * model->B2vbb) > tmp)
here->pParam->B2betasB = -tmp / model->B2vbb;
here->pParam->B2beta20 = model->B2mob200
+ model->B2mob20W * Inv_W
+ model->B2mob20L * Inv_L;
here->pParam->B2beta2B = model->B2mob2B0
+ model->B2mob2BW * Inv_W
+ model->B2mob2BL * Inv_L;
here->pParam->B2beta2G = model->B2mob2G0
+ model->B2mob2GW * Inv_W
+ model->B2mob2GL * Inv_L;
here->pParam->B2beta30 = model->B2mob300
+ model->B2mob30W * Inv_W
+ model->B2mob30L * Inv_L;
here->pParam->B2beta3B = model->B2mob3B0
+ model->B2mob3BW * Inv_W
+ model->B2mob3BL * Inv_L;
here->pParam->B2beta3G = model->B2mob3G0
+ model->B2mob3GW * Inv_W
+ model->B2mob3GL * Inv_L;
here->pParam->B2beta40 = model->B2mob400
+ model->B2mob40W * Inv_W
+ model->B2mob40L * Inv_L;
here->pParam->B2beta4B = model->B2mob4B0
+ model->B2mob4BW * Inv_W
+ model->B2mob4BL * Inv_L;
here->pParam->B2beta4G = model->B2mob4G0
+ model->B2mob4GW * Inv_W
+ model->B2mob4GL * Inv_L;
here->pParam->B2betasB = -tmp / model->B2vbb;
here->pParam->B2beta20 = model->B2mob200
+ model->B2mob20W * Inv_W
+ model->B2mob20L * Inv_L;
here->pParam->B2beta2B = model->B2mob2B0
+ model->B2mob2BW * Inv_W
+ model->B2mob2BL * Inv_L;
here->pParam->B2beta2G = model->B2mob2G0
+ model->B2mob2GW * Inv_W
+ model->B2mob2GL * Inv_L;
here->pParam->B2beta30 = model->B2mob300
+ model->B2mob30W * Inv_W
+ model->B2mob30L * Inv_L;
here->pParam->B2beta3B = model->B2mob3B0
+ model->B2mob3BW * Inv_W
+ model->B2mob3BL * Inv_L;
here->pParam->B2beta3G = model->B2mob3G0
+ model->B2mob3GW * Inv_W
+ model->B2mob3GL * Inv_L;
here->pParam->B2beta40 = model->B2mob400
+ model->B2mob40W * Inv_W
+ model->B2mob40L * Inv_L;
here->pParam->B2beta4B = model->B2mob4B0
+ model->B2mob4BW * Inv_W
+ model->B2mob4BL * Inv_L;
here->pParam->B2beta4G = model->B2mob4G0
+ model->B2mob4GW * Inv_W
+ model->B2mob4GL * Inv_L;
CoxWoverL = model->B2Cox * EffectiveWidth / EffectiveLength;
CoxWoverL = model->B2Cox * EffectiveWidth / EffectiveLength;
here->pParam->B2beta0 *= CoxWoverL;
here->pParam->B2beta0B *= CoxWoverL;
here->pParam->B2betas0 *= CoxWoverL;
here->pParam->B2betasB *= CoxWoverL;
here->pParam->B2beta30 *= CoxWoverL;
here->pParam->B2beta3B *= CoxWoverL;
here->pParam->B2beta3G *= CoxWoverL;
here->pParam->B2beta40 *= CoxWoverL;
here->pParam->B2beta4B *= CoxWoverL;
here->pParam->B2beta4G *= CoxWoverL;
here->pParam->B2beta0 *= CoxWoverL;
here->pParam->B2beta0B *= CoxWoverL;
here->pParam->B2betas0 *= CoxWoverL;
here->pParam->B2betasB *= CoxWoverL;
here->pParam->B2beta30 *= CoxWoverL;
here->pParam->B2beta3B *= CoxWoverL;
here->pParam->B2beta3G *= CoxWoverL;
here->pParam->B2beta40 *= CoxWoverL;
here->pParam->B2beta4B *= CoxWoverL;
here->pParam->B2beta4G *= CoxWoverL;
here->pParam->B2ua0 = model->B2ua00 + model->B2ua0W * Inv_W
+ model->B2ua0L * Inv_L;
+ model->B2ua0L * Inv_L;
here->pParam->B2uaB = model->B2uaB0 + model->B2uaBW * Inv_W
+ model->B2uaBL * Inv_L;
+ model->B2uaBL * Inv_L;
here->pParam->B2ub0 = model->B2ub00 + model->B2ub0W * Inv_W
+ model->B2ub0L * Inv_L;
+ model->B2ub0L * Inv_L;
here->pParam->B2ubB = model->B2ubB0 + model->B2ubBW * Inv_W
+ model->B2ubBL * Inv_L;
+ model->B2ubBL * Inv_L;
here->pParam->B2u10 = model->B2u100 + model->B2u10W * Inv_W
+ model->B2u10L * Inv_L;
+ model->B2u10L * Inv_L;
here->pParam->B2u1B = model->B2u1B0 + model->B2u1BW * Inv_W
+ model->B2u1BL * Inv_L;
+ model->B2u1BL * Inv_L;
here->pParam->B2u1D = model->B2u1D0 + model->B2u1DW * Inv_W
+ model->B2u1DL * Inv_L;
+ model->B2u1DL * Inv_L;
here->pParam->B2n0 = model->B2n00 + model->B2n0W * Inv_W
+ model->B2n0L * Inv_L;
+ model->B2n0L * Inv_L;
here->pParam->B2nB = model->B2nB0 + model->B2nBW * Inv_W
+ model->B2nBL * Inv_L;
+ model->B2nBL * Inv_L;
here->pParam->B2nD = model->B2nD0 + model->B2nDW * Inv_W
+ model->B2nDL * Inv_L;
+ model->B2nDL * Inv_L;
if (here->pParam->B2n0 < 0.0)
here->pParam->B2n0 = 0.0;
here->pParam->B2n0 = 0.0;
here->pParam->B2vof0 = model->B2vof00
+ model->B2vof0W * Inv_W
+ model->B2vof0L * Inv_L;
here->pParam->B2vofB = model->B2vofB0
+ model->B2vofBW * Inv_W
+ model->B2vofBL * Inv_L;
here->pParam->B2vofD = model->B2vofD0
+ model->B2vofDW * Inv_W
+ model->B2vofDL * Inv_L;
here->pParam->B2vof0 = model->B2vof00
+ model->B2vof0W * Inv_W
+ model->B2vof0L * Inv_L;
here->pParam->B2vofB = model->B2vofB0
+ model->B2vofBW * Inv_W
+ model->B2vofBL * Inv_L;
here->pParam->B2vofD = model->B2vofD0
+ model->B2vofDW * Inv_W
+ model->B2vofDL * Inv_L;
here->pParam->B2ai0 = model->B2ai00 + model->B2ai0W * Inv_W
+ model->B2ai0L * Inv_L;
+ model->B2ai0L * Inv_L;
here->pParam->B2aiB = model->B2aiB0 + model->B2aiBW * Inv_W
+ model->B2aiBL * Inv_L;
+ model->B2aiBL * Inv_L;
here->pParam->B2bi0 = model->B2bi00 + model->B2bi0W * Inv_W
+ model->B2bi0L * Inv_L;
+ model->B2bi0L * Inv_L;
here->pParam->B2biB = model->B2biB0 + model->B2biBW * Inv_W
+ model->B2biBL * Inv_L;
here->pParam->B2vghigh = model->B2vghigh0
+ model->B2vghighW * Inv_W
+ model->B2vghighL * Inv_L;
here->pParam->B2vglow = model->B2vglow0
+ model->B2vglowW * Inv_W
+ model->B2vglowL * Inv_L;
+ model->B2biBL * Inv_L;
here->pParam->B2vghigh = model->B2vghigh0
+ model->B2vghighW * Inv_W
+ model->B2vghighL * Inv_L;
here->pParam->B2vglow = model->B2vglow0
+ model->B2vglowW * Inv_W
+ model->B2vglowL * Inv_L;
here->pParam->CoxWL = model->B2Cox * EffectiveLength
* EffectiveWidth * 1.0e4;
here->pParam->One_Third_CoxWL = here->pParam->CoxWL / 3.0;
here->pParam->Two_Third_CoxWL = 2.0
* here->pParam->One_Third_CoxWL;
here->pParam->B2GSoverlapCap = model->B2gateSourceOverlapCap
* EffectiveWidth;
here->pParam->B2GDoverlapCap = model->B2gateDrainOverlapCap
* EffectiveWidth;
here->pParam->B2GBoverlapCap = model->B2gateBulkOverlapCap
* EffectiveLength;
here->pParam->CoxWL = model->B2Cox * EffectiveLength
* EffectiveWidth * 1.0e4;
here->pParam->One_Third_CoxWL = here->pParam->CoxWL / 3.0;
here->pParam->Two_Third_CoxWL = 2.0
* here->pParam->One_Third_CoxWL;
here->pParam->B2GSoverlapCap = model->B2gateSourceOverlapCap
* EffectiveWidth;
here->pParam->B2GDoverlapCap = model->B2gateDrainOverlapCap
* EffectiveWidth;
here->pParam->B2GBoverlapCap = model->B2gateBulkOverlapCap
* EffectiveLength;
here->pParam->SqrtPhi = sqrt(here->pParam->B2phi);
here->pParam->Phis3 = here->pParam->SqrtPhi
* here->pParam->B2phi;
here->pParam->Phis3 = here->pParam->SqrtPhi
* here->pParam->B2phi;
here->pParam->Arg = here->pParam->B2betasB
- here->pParam->B2beta0B - model->B2vdd
* (here->pParam->B2beta3B - model->B2vdd
* here->pParam->B2beta4B);
- here->pParam->B2beta0B - model->B2vdd
* (here->pParam->B2beta3B - model->B2vdd
* here->pParam->B2beta4B);
}
@ -248,26 +248,26 @@ B2temp(GENmodel *inModel, CKTcircuit *ckt)
/* process drain series resistance */
if( (here->B2drainConductance=model->B2sheetResistance *
here->B2drainSquares) != 0.0 ) {
here->B2drainSquares) != 0.0 ) {
here->B2drainConductance = 1. / here->B2drainConductance ;
}
}
/* process source series resistance */
if( (here->B2sourceConductance=model->B2sheetResistance *
here->B2sourceSquares) != 0.0 ) {
here->B2sourceSquares) != 0.0 ) {
here->B2sourceConductance = 1. / here->B2sourceConductance ;
}
here->pParam->B2vt0 = here->pParam->B2vfb
+ here->pParam->B2phi
+ here->pParam->B2k1 * here->pParam->SqrtPhi
- here->pParam->B2k2 * here->pParam->B2phi;
here->pParam->B2vt0 = here->pParam->B2vfb
+ here->pParam->B2phi
+ here->pParam->B2k1 * here->pParam->SqrtPhi
- here->pParam->B2k2 * here->pParam->B2phi;
here->B2von = here->pParam->B2vt0; /* added for initialization*/
}
}
return(OK);
}
}

934
src/spicelib/devices/bsim3soi_dd/b3soiddtemp.c
File diff suppressed because it is too large
View File

932
src/spicelib/devices/bsim3soi_fd/b3soifdtemp.c
File diff suppressed because it is too large
View File

1042
src/spicelib/devices/bsim3soi_pd/b3soipdtemp.c
File diff suppressed because it is too large
View File

858
src/spicelib/devices/bsim3v0/b3v0temp.c
View File

@ -38,8 +38,8 @@ int Size_Not_Found;
/* loop through all the BSIM3v0 device models */
for (; model != NULL; model = BSIM3v0nextModel(model))
{ Temp = ckt->CKTtemp;
if (model->BSIM3v0bulkJctPotential < 0.1)
model->BSIM3v0bulkJctPotential = 0.1;
if (model->BSIM3v0bulkJctPotential < 0.1)
model->BSIM3v0bulkJctPotential = 0.1;
if (model->BSIM3v0sidewallJctPotential < 0.1)
model->BSIM3v0sidewallJctPotential = 0.1;
@ -50,41 +50,41 @@ int Size_Not_Found;
p = next_p;
}
model->pSizeDependParamKnot = NULL;
pLastKnot = NULL;
pLastKnot = NULL;
Tnom = model->BSIM3v0tnom;
TRatio = Temp / Tnom;
/* loop through all the instances of the model */
Tnom = model->BSIM3v0tnom;
TRatio = Temp / Tnom;
/* loop through all the instances of the model */
for (here = BSIM3v0instances(model); here != NULL;
here=BSIM3v0nextInstance(here))
{
pSizeDependParamKnot = model->pSizeDependParamKnot;
Size_Not_Found = 1;
while ((pSizeDependParamKnot != NULL) && Size_Not_Found)
{ if ((here->BSIM3v0l == pSizeDependParamKnot->Length)
&& (here->BSIM3v0w == pSizeDependParamKnot->Width))
here=BSIM3v0nextInstance(here))
{
pSizeDependParamKnot = model->pSizeDependParamKnot;
Size_Not_Found = 1;
while ((pSizeDependParamKnot != NULL) && Size_Not_Found)
{ if ((here->BSIM3v0l == pSizeDependParamKnot->Length)
&& (here->BSIM3v0w == pSizeDependParamKnot->Width))
{ Size_Not_Found = 0;
here->pParam = pSizeDependParamKnot;
}
else
{ pLastKnot = pSizeDependParamKnot;
pSizeDependParamKnot = pSizeDependParamKnot->pNext;
}
here->pParam = pSizeDependParamKnot;
}
else
{ pLastKnot = pSizeDependParamKnot;
pSizeDependParamKnot = pSizeDependParamKnot->pNext;
}
}
if (Size_Not_Found)
{ pParam = TMALLOC(struct bsim3v0SizeDependParam, 1);
if (Size_Not_Found)
{ pParam = TMALLOC(struct bsim3v0SizeDependParam, 1);
if (pLastKnot == NULL)
model->pSizeDependParamKnot = pParam;
model->pSizeDependParamKnot = pParam;
else
pLastKnot->pNext = pParam;
pLastKnot->pNext = pParam;
pParam->pNext = NULL;
here->pParam = pParam;
Ldrn = here->BSIM3v0l;
Wdrn = here->BSIM3v0w;
Ldrn = here->BSIM3v0l;
Wdrn = here->BSIM3v0w;
T0 = pow(Ldrn, model->BSIM3v0Lln);
T1 = pow(Wdrn, model->BSIM3v0Lwn);
tmp1 = model->BSIM3v0Ll / T0 + model->BSIM3v0Lw / T1
@ -101,7 +101,7 @@ int Size_Not_Found;
pParam->BSIM3v0leff = here->BSIM3v0l - 2.0 * pParam->BSIM3v0dl;
if (pParam->BSIM3v0leff <= 0.0)
{
{
SPfrontEnd->IFerrorf (ERR_FATAL,
"BSIM3v0: mosfet %s, model %s: Effective channel length <= 0",
model->BSIM3v0modName, here->BSIM3v0name);
@ -110,7 +110,7 @@ int Size_Not_Found;
pParam->BSIM3v0weff = here->BSIM3v0w - 2.0 * pParam->BSIM3v0dw;
if (pParam->BSIM3v0weff <= 0.0)
{
{
SPfrontEnd->IFerrorf (ERR_FATAL,
"BSIM3v0: mosfet %s, model %s: Effective channel width <= 0",
model->BSIM3v0modName, here->BSIM3v0name);
@ -119,7 +119,7 @@ int Size_Not_Found;
pParam->BSIM3v0leffCV = here->BSIM3v0l - 2.0 * pParam->BSIM3v0dlc;
if (pParam->BSIM3v0leffCV <= 0.0)
{
{
SPfrontEnd->IFerrorf (ERR_FATAL,
"BSIM3v0: mosfet %s, model %s: Effective channel length for C-V <= 0",
model->BSIM3v0modName, here->BSIM3v0name);
@ -128,359 +128,359 @@ int Size_Not_Found;
pParam->BSIM3v0weffCV = here->BSIM3v0w - 2.0 * pParam->BSIM3v0dwc;
if (pParam->BSIM3v0weffCV <= 0.0)
{
{
SPfrontEnd->IFerrorf (ERR_FATAL,
"BSIM3v0: mosfet %s, model %s: Effective channel width for C-V <= 0",
model->BSIM3v0modName, here->BSIM3v0name);
return(E_BADPARM);
}
model->BSIM3v0vcrit = CONSTvt0 * log(CONSTvt0
/ (CONSTroot2 * 1.0e-14));
model->BSIM3v0vcrit = CONSTvt0 * log(CONSTvt0
/ (CONSTroot2 * 1.0e-14));
model->BSIM3v0factor1 = sqrt(EPSSI / EPSOX * model->BSIM3v0tox);
if (model->BSIM3v0binUnit == 1)
{ Inv_L = 1.0e-6 / pParam->BSIM3v0leff;
Inv_W = 1.0e-6 / pParam->BSIM3v0weff;
Inv_LW = 1.0e-12 / (pParam->BSIM3v0leff
* pParam->BSIM3v0weff);
}
else
{ Inv_L = 1.0 / pParam->BSIM3v0leff;
Inv_W = 1.0 / pParam->BSIM3v0weff;
Inv_LW = 1.0 / (pParam->BSIM3v0leff
* pParam->BSIM3v0weff);
}
pParam->BSIM3v0cdsc = model->BSIM3v0cdsc
+ model->BSIM3v0lcdsc * Inv_L
+ model->BSIM3v0wcdsc * Inv_W
+ model->BSIM3v0pcdsc * Inv_LW;
pParam->BSIM3v0cdscb = model->BSIM3v0cdscb
+ model->BSIM3v0lcdscb * Inv_L
+ model->BSIM3v0wcdscb * Inv_W
+ model->BSIM3v0pcdscb * Inv_LW;
pParam->BSIM3v0cdscd = model->BSIM3v0cdscd
+ model->BSIM3v0lcdscd * Inv_L
+ model->BSIM3v0wcdscd * Inv_W
+ model->BSIM3v0pcdscd * Inv_LW;
pParam->BSIM3v0cit = model->BSIM3v0cit
+ model->BSIM3v0lcit * Inv_L
+ model->BSIM3v0wcit * Inv_W
+ model->BSIM3v0pcit * Inv_LW;
pParam->BSIM3v0nfactor = model->BSIM3v0nfactor
+ model->BSIM3v0lnfactor * Inv_L
+ model->BSIM3v0wnfactor * Inv_W
+ model->BSIM3v0pnfactor * Inv_LW;
pParam->BSIM3v0xj = model->BSIM3v0xj
+ model->BSIM3v0lxj * Inv_L
+ model->BSIM3v0wxj * Inv_W
+ model->BSIM3v0pxj * Inv_LW;
pParam->BSIM3v0vsat = model->BSIM3v0vsat
+ model->BSIM3v0lvsat * Inv_L
+ model->BSIM3v0wvsat * Inv_W
+ model->BSIM3v0pvsat * Inv_LW;
pParam->BSIM3v0at = model->BSIM3v0at
+ model->BSIM3v0lat * Inv_L
+ model->BSIM3v0wat * Inv_W
+ model->BSIM3v0pat * Inv_LW;
pParam->BSIM3v0a0 = model->BSIM3v0a0
+ model->BSIM3v0la0 * Inv_L
+ model->BSIM3v0wa0 * Inv_W
+ model->BSIM3v0pa0 * Inv_LW;
pParam->BSIM3v0ags = model->BSIM3v0ags
+ model->BSIM3v0lags * Inv_L
+ model->BSIM3v0wags * Inv_W
+ model->BSIM3v0pags * Inv_LW;
pParam->BSIM3v0a1 = model->BSIM3v0a1
+ model->BSIM3v0la1 * Inv_L
+ model->BSIM3v0wa1 * Inv_W
+ model->BSIM3v0pa1 * Inv_LW;
pParam->BSIM3v0a2 = model->BSIM3v0a2
+ model->BSIM3v0la2 * Inv_L
+ model->BSIM3v0wa2 * Inv_W
+ model->BSIM3v0pa2 * Inv_LW;
pParam->BSIM3v0keta = model->BSIM3v0keta
+ model->BSIM3v0lketa * Inv_L
+ model->BSIM3v0wketa * Inv_W
+ model->BSIM3v0pketa * Inv_LW;
pParam->BSIM3v0nsub = model->BSIM3v0nsub
+ model->BSIM3v0lnsub * Inv_L
+ model->BSIM3v0wnsub * Inv_W
+ model->BSIM3v0pnsub * Inv_LW;
pParam->BSIM3v0npeak = model->BSIM3v0npeak
+ model->BSIM3v0lnpeak * Inv_L
+ model->BSIM3v0wnpeak * Inv_W
+ model->BSIM3v0pnpeak * Inv_LW;
pParam->BSIM3v0ngate = model->BSIM3v0ngate
+ model->BSIM3v0lngate * Inv_L
+ model->BSIM3v0wngate * Inv_W
+ model->BSIM3v0pngate * Inv_LW;
pParam->BSIM3v0gamma1 = model->BSIM3v0gamma1
+ model->BSIM3v0lgamma1 * Inv_L
+ model->BSIM3v0wgamma1 * Inv_W
+ model->BSIM3v0pgamma1 * Inv_LW;
pParam->BSIM3v0gamma2 = model->BSIM3v0gamma2
+ model->BSIM3v0lgamma2 * Inv_L
+ model->BSIM3v0wgamma2 * Inv_W
+ model->BSIM3v0pgamma2 * Inv_LW;
pParam->BSIM3v0vbx = model->BSIM3v0vbx
+ model->BSIM3v0lvbx * Inv_L
+ model->BSIM3v0wvbx * Inv_W
+ model->BSIM3v0pvbx * Inv_LW;
pParam->BSIM3v0vbm = model->BSIM3v0vbm
+ model->BSIM3v0lvbm * Inv_L
+ model->BSIM3v0wvbm * Inv_W
+ model->BSIM3v0pvbm * Inv_LW;
pParam->BSIM3v0xt = model->BSIM3v0xt
+ model->BSIM3v0lxt * Inv_L
+ model->BSIM3v0wxt * Inv_W
+ model->BSIM3v0pxt * Inv_LW;
pParam->BSIM3v0k1 = model->BSIM3v0k1
+ model->BSIM3v0lk1 * Inv_L
+ model->BSIM3v0wk1 * Inv_W
+ model->BSIM3v0pk1 * Inv_LW;
pParam->BSIM3v0kt1 = model->BSIM3v0kt1
+ model->BSIM3v0lkt1 * Inv_L
+ model->BSIM3v0wkt1 * Inv_W
+ model->BSIM3v0pkt1 * Inv_LW;
pParam->BSIM3v0kt1l = model->BSIM3v0kt1l
+ model->BSIM3v0lkt1l * Inv_L
+ model->BSIM3v0wkt1l * Inv_W
+ model->BSIM3v0pkt1l * Inv_LW;
pParam->BSIM3v0k2 = model->BSIM3v0k2
+ model->BSIM3v0lk2 * Inv_L
+ model->BSIM3v0wk2 * Inv_W
+ model->BSIM3v0pk2 * Inv_LW;
pParam->BSIM3v0kt2 = model->BSIM3v0kt2
+ model->BSIM3v0lkt2 * Inv_L
+ model->BSIM3v0wkt2 * Inv_W
+ model->BSIM3v0pkt2 * Inv_LW;
pParam->BSIM3v0k3 = model->BSIM3v0k3
+ model->BSIM3v0lk3 * Inv_L
+ model->BSIM3v0wk3 * Inv_W
+ model->BSIM3v0pk3 * Inv_LW;
pParam->BSIM3v0k3b = model->BSIM3v0k3b
+ model->BSIM3v0lk3b * Inv_L
+ model->BSIM3v0wk3b * Inv_W
+ model->BSIM3v0pk3b * Inv_LW;
pParam->BSIM3v0w0 = model->BSIM3v0w0
+ model->BSIM3v0lw0 * Inv_L
+ model->BSIM3v0ww0 * Inv_W
+ model->BSIM3v0pw0 * Inv_LW;
pParam->BSIM3v0nlx = model->BSIM3v0nlx
+ model->BSIM3v0lnlx * Inv_L
+ model->BSIM3v0wnlx * Inv_W
+ model->BSIM3v0pnlx * Inv_LW;
pParam->BSIM3v0dvt0 = model->BSIM3v0dvt0
+ model->BSIM3v0ldvt0 * Inv_L
+ model->BSIM3v0wdvt0 * Inv_W
+ model->BSIM3v0pdvt0 * Inv_LW;
pParam->BSIM3v0dvt1 = model->BSIM3v0dvt1
+ model->BSIM3v0ldvt1 * Inv_L
+ model->BSIM3v0wdvt1 * Inv_W
+ model->BSIM3v0pdvt1 * Inv_LW;
pParam->BSIM3v0dvt2 = model->BSIM3v0dvt2
+ model->BSIM3v0ldvt2 * Inv_L
+ model->BSIM3v0wdvt2 * Inv_W
+ model->BSIM3v0pdvt2 * Inv_LW;
pParam->BSIM3v0dvt0w = model->BSIM3v0dvt0w
+ model->BSIM3v0ldvt0w * Inv_L
+ model->BSIM3v0wdvt0w * Inv_W
+ model->BSIM3v0pdvt0w * Inv_LW;
pParam->BSIM3v0dvt1w = model->BSIM3v0dvt1w
+ model->BSIM3v0ldvt1w * Inv_L
+ model->BSIM3v0wdvt1w * Inv_W
+ model->BSIM3v0pdvt1w * Inv_LW;
pParam->BSIM3v0dvt2w = model->BSIM3v0dvt2w
+ model->BSIM3v0ldvt2w * Inv_L
+ model->BSIM3v0wdvt2w * Inv_W
+ model->BSIM3v0pdvt2w * Inv_LW;
pParam->BSIM3v0drout = model->BSIM3v0drout
+ model->BSIM3v0ldrout * Inv_L
+ model->BSIM3v0wdrout * Inv_W
+ model->BSIM3v0pdrout * Inv_LW;
pParam->BSIM3v0dsub = model->BSIM3v0dsub
+ model->BSIM3v0ldsub * Inv_L
+ model->BSIM3v0wdsub * Inv_W
+ model->BSIM3v0pdsub * Inv_LW;
pParam->BSIM3v0vth0 = model->BSIM3v0vth0
+ model->BSIM3v0lvth0 * Inv_L
+ model->BSIM3v0wvth0 * Inv_W
+ model->BSIM3v0pvth0 * Inv_LW;
pParam->BSIM3v0ua = model->BSIM3v0ua
+ model->BSIM3v0lua * Inv_L
+ model->BSIM3v0wua * Inv_W
+ model->BSIM3v0pua * Inv_LW;
pParam->BSIM3v0ua1 = model->BSIM3v0ua1
+ model->BSIM3v0lua1 * Inv_L
+ model->BSIM3v0wua1 * Inv_W
+ model->BSIM3v0pua1 * Inv_LW;
pParam->BSIM3v0ub = model->BSIM3v0ub
+ model->BSIM3v0lub * Inv_L
+ model->BSIM3v0wub * Inv_W
+ model->BSIM3v0pub * Inv_LW;
pParam->BSIM3v0ub1 = model->BSIM3v0ub1
+ model->BSIM3v0lub1 * Inv_L
+ model->BSIM3v0wub1 * Inv_W
+ model->BSIM3v0pub1 * Inv_LW;
pParam->BSIM3v0uc = model->BSIM3v0uc
+ model->BSIM3v0luc * Inv_L
+ model->BSIM3v0wuc * Inv_W
+ model->BSIM3v0puc * Inv_LW;
pParam->BSIM3v0uc1 = model->BSIM3v0uc1
+ model->BSIM3v0luc1 * Inv_L
+ model->BSIM3v0wuc1 * Inv_W
+ model->BSIM3v0puc1 * Inv_LW;
pParam->BSIM3v0u0 = model->BSIM3v0u0
+ model->BSIM3v0lu0 * Inv_L
+ model->BSIM3v0wu0 * Inv_W
+ model->BSIM3v0pu0 * Inv_LW;
pParam->BSIM3v0ute = model->BSIM3v0ute
+ model->BSIM3v0lute * Inv_L
+ model->BSIM3v0wute * Inv_W
+ model->BSIM3v0pute * Inv_LW;
pParam->BSIM3v0voff = model->BSIM3v0voff
+ model->BSIM3v0lvoff * Inv_L
+ model->BSIM3v0wvoff * Inv_W
+ model->BSIM3v0pvoff * Inv_LW;
pParam->BSIM3v0delta = model->BSIM3v0delta
+ model->BSIM3v0ldelta * Inv_L
+ model->BSIM3v0wdelta * Inv_W
+ model->BSIM3v0pdelta * Inv_LW;
pParam->BSIM3v0rdsw = model->BSIM3v0rdsw
+ model->BSIM3v0lrdsw * Inv_L
+ model->BSIM3v0wrdsw * Inv_W
+ model->BSIM3v0prdsw * Inv_LW;
pParam->BSIM3v0prwg = model->BSIM3v0prwg
+ model->BSIM3v0lprwg * Inv_L
+ model->BSIM3v0wprwg * Inv_W
+ model->BSIM3v0pprwg * Inv_LW;
pParam->BSIM3v0prwb = model->BSIM3v0prwb
+ model->BSIM3v0lprwb * Inv_L
+ model->BSIM3v0wprwb * Inv_W
+ model->BSIM3v0pprwb * Inv_LW;
pParam->BSIM3v0prt = model->BSIM3v0prt
+ model->BSIM3v0lprt * Inv_L
+ model->BSIM3v0wprt * Inv_W
+ model->BSIM3v0pprt * Inv_LW;
pParam->BSIM3v0eta0 = model->BSIM3v0eta0
+ model->BSIM3v0leta0 * Inv_L
+ model->BSIM3v0weta0 * Inv_W
+ model->BSIM3v0peta0 * Inv_LW;
pParam->BSIM3v0etab = model->BSIM3v0etab
+ model->BSIM3v0letab * Inv_L
+ model->BSIM3v0wetab * Inv_W
+ model->BSIM3v0petab * Inv_LW;
pParam->BSIM3v0pclm = model->BSIM3v0pclm
+ model->BSIM3v0lpclm * Inv_L
+ model->BSIM3v0wpclm * Inv_W
+ model->BSIM3v0ppclm * Inv_LW;
pParam->BSIM3v0pdibl1 = model->BSIM3v0pdibl1
+ model->BSIM3v0lpdibl1 * Inv_L
+ model->BSIM3v0wpdibl1 * Inv_W
+ model->BSIM3v0ppdibl1 * Inv_LW;
pParam->BSIM3v0pdibl2 = model->BSIM3v0pdibl2
+ model->BSIM3v0lpdibl2 * Inv_L
+ model->BSIM3v0wpdibl2 * Inv_W
+ model->BSIM3v0ppdibl2 * Inv_LW;
pParam->BSIM3v0pdiblb = model->BSIM3v0pdiblb
+ model->BSIM3v0lpdiblb * Inv_L
+ model->BSIM3v0wpdiblb * Inv_W
+ model->BSIM3v0ppdiblb * Inv_LW;
pParam->BSIM3v0pscbe1 = model->BSIM3v0pscbe1
+ model->BSIM3v0lpscbe1 * Inv_L
+ model->BSIM3v0wpscbe1 * Inv_W
+ model->BSIM3v0ppscbe1 * Inv_LW;
pParam->BSIM3v0pscbe2 = model->BSIM3v0pscbe2
+ model->BSIM3v0lpscbe2 * Inv_L
+ model->BSIM3v0wpscbe2 * Inv_W
+ model->BSIM3v0ppscbe2 * Inv_LW;
pParam->BSIM3v0pvag = model->BSIM3v0pvag
+ model->BSIM3v0lpvag * Inv_L
+ model->BSIM3v0wpvag * Inv_W
+ model->BSIM3v0ppvag * Inv_LW;
pParam->BSIM3v0wr = model->BSIM3v0wr
+ model->BSIM3v0lwr * Inv_L
+ model->BSIM3v0wwr * Inv_W
+ model->BSIM3v0pwr * Inv_LW;
pParam->BSIM3v0dwg = model->BSIM3v0dwg
+ model->BSIM3v0ldwg * Inv_L
+ model->BSIM3v0wdwg * Inv_W
+ model->BSIM3v0pdwg * Inv_LW;
pParam->BSIM3v0dwb = model->BSIM3v0dwb
+ model->BSIM3v0ldwb * Inv_L
+ model->BSIM3v0wdwb * Inv_W
+ model->BSIM3v0pdwb * Inv_LW;
pParam->BSIM3v0b0 = model->BSIM3v0b0
+ model->BSIM3v0lb0 * Inv_L
+ model->BSIM3v0wb0 * Inv_W
+ model->BSIM3v0pb0 * Inv_LW;
pParam->BSIM3v0b1 = model->BSIM3v0b1
+ model->BSIM3v0lb1 * Inv_L
+ model->BSIM3v0wb1 * Inv_W
+ model->BSIM3v0pb1 * Inv_LW;
pParam->BSIM3v0alpha0 = model->BSIM3v0alpha0
+ model->BSIM3v0lalpha0 * Inv_L
+ model->BSIM3v0walpha0 * Inv_W
+ model->BSIM3v0palpha0 * Inv_LW;
pParam->BSIM3v0beta0 = model->BSIM3v0beta0
+ model->BSIM3v0lbeta0 * Inv_L
+ model->BSIM3v0wbeta0 * Inv_W
+ model->BSIM3v0pbeta0 * Inv_LW;
/* CV model */
pParam->BSIM3v0elm = model->BSIM3v0elm
+ model->BSIM3v0lelm * Inv_L
+ model->BSIM3v0welm * Inv_W
+ model->BSIM3v0pelm * Inv_LW;
pParam->BSIM3v0cgsl = model->BSIM3v0cgsl
+ model->BSIM3v0lcgsl * Inv_L
+ model->BSIM3v0wcgsl * Inv_W
+ model->BSIM3v0pcgsl * Inv_LW;
pParam->BSIM3v0cgdl = model->BSIM3v0cgdl
+ model->BSIM3v0lcgdl * Inv_L
+ model->BSIM3v0wcgdl * Inv_W
+ model->BSIM3v0pcgdl * Inv_LW;
pParam->BSIM3v0ckappa = model->BSIM3v0ckappa
+ model->BSIM3v0lckappa * Inv_L
+ model->BSIM3v0wckappa * Inv_W
+ model->BSIM3v0pckappa * Inv_LW;
pParam->BSIM3v0cf = model->BSIM3v0cf
+ model->BSIM3v0lcf * Inv_L
+ model->BSIM3v0wcf * Inv_W
+ model->BSIM3v0pcf * Inv_LW;
pParam->BSIM3v0clc = model->BSIM3v0clc
+ model->BSIM3v0lclc * Inv_L
+ model->BSIM3v0wclc * Inv_W
+ model->BSIM3v0pclc * Inv_LW;
pParam->BSIM3v0cle = model->BSIM3v0cle
+ model->BSIM3v0lcle * Inv_L
+ model->BSIM3v0wcle * Inv_W
+ model->BSIM3v0pcle * Inv_LW;
if (model->BSIM3v0binUnit == 1)
{ Inv_L = 1.0e-6 / pParam->BSIM3v0leff;
Inv_W = 1.0e-6 / pParam->BSIM3v0weff;
Inv_LW = 1.0e-12 / (pParam->BSIM3v0leff
* pParam->BSIM3v0weff);
}
else
{ Inv_L = 1.0 / pParam->BSIM3v0leff;
Inv_W = 1.0 / pParam->BSIM3v0weff;
Inv_LW = 1.0 / (pParam->BSIM3v0leff
* pParam->BSIM3v0weff);
}
pParam->BSIM3v0cdsc = model->BSIM3v0cdsc
+ model->BSIM3v0lcdsc * Inv_L
+ model->BSIM3v0wcdsc * Inv_W
+ model->BSIM3v0pcdsc * Inv_LW;
pParam->BSIM3v0cdscb = model->BSIM3v0cdscb
+ model->BSIM3v0lcdscb * Inv_L
+ model->BSIM3v0wcdscb * Inv_W
+ model->BSIM3v0pcdscb * Inv_LW;
pParam->BSIM3v0cdscd = model->BSIM3v0cdscd
+ model->BSIM3v0lcdscd * Inv_L
+ model->BSIM3v0wcdscd * Inv_W
+ model->BSIM3v0pcdscd * Inv_LW;
pParam->BSIM3v0cit = model->BSIM3v0cit
+ model->BSIM3v0lcit * Inv_L
+ model->BSIM3v0wcit * Inv_W
+ model->BSIM3v0pcit * Inv_LW;
pParam->BSIM3v0nfactor = model->BSIM3v0nfactor
+ model->BSIM3v0lnfactor * Inv_L
+ model->BSIM3v0wnfactor * Inv_W
+ model->BSIM3v0pnfactor * Inv_LW;
pParam->BSIM3v0xj = model->BSIM3v0xj
+ model->BSIM3v0lxj * Inv_L
+ model->BSIM3v0wxj * Inv_W
+ model->BSIM3v0pxj * Inv_LW;
pParam->BSIM3v0vsat = model->BSIM3v0vsat
+ model->BSIM3v0lvsat * Inv_L
+ model->BSIM3v0wvsat * Inv_W
+ model->BSIM3v0pvsat * Inv_LW;
pParam->BSIM3v0at = model->BSIM3v0at
+ model->BSIM3v0lat * Inv_L
+ model->BSIM3v0wat * Inv_W
+ model->BSIM3v0pat * Inv_LW;
pParam->BSIM3v0a0 = model->BSIM3v0a0
+ model->BSIM3v0la0 * Inv_L
+ model->BSIM3v0wa0 * Inv_W
+ model->BSIM3v0pa0 * Inv_LW;
pParam->BSIM3v0ags = model->BSIM3v0ags
+ model->BSIM3v0lags * Inv_L
+ model->BSIM3v0wags * Inv_W
+ model->BSIM3v0pags * Inv_LW;
pParam->BSIM3v0a1 = model->BSIM3v0a1
+ model->BSIM3v0la1 * Inv_L
+ model->BSIM3v0wa1 * Inv_W
+ model->BSIM3v0pa1 * Inv_LW;
pParam->BSIM3v0a2 = model->BSIM3v0a2
+ model->BSIM3v0la2 * Inv_L
+ model->BSIM3v0wa2 * Inv_W
+ model->BSIM3v0pa2 * Inv_LW;
pParam->BSIM3v0keta = model->BSIM3v0keta
+ model->BSIM3v0lketa * Inv_L
+ model->BSIM3v0wketa * Inv_W
+ model->BSIM3v0pketa * Inv_LW;
pParam->BSIM3v0nsub = model->BSIM3v0nsub
+ model->BSIM3v0lnsub * Inv_L
+ model->BSIM3v0wnsub * Inv_W
+ model->BSIM3v0pnsub * Inv_LW;
pParam->BSIM3v0npeak = model->BSIM3v0npeak
+ model->BSIM3v0lnpeak * Inv_L
+ model->BSIM3v0wnpeak * Inv_W
+ model->BSIM3v0pnpeak * Inv_LW;
pParam->BSIM3v0ngate = model->BSIM3v0ngate
+ model->BSIM3v0lngate * Inv_L
+ model->BSIM3v0wngate * Inv_W
+ model->BSIM3v0pngate * Inv_LW;
pParam->BSIM3v0gamma1 = model->BSIM3v0gamma1
+ model->BSIM3v0lgamma1 * Inv_L
+ model->BSIM3v0wgamma1 * Inv_W
+ model->BSIM3v0pgamma1 * Inv_LW;
pParam->BSIM3v0gamma2 = model->BSIM3v0gamma2
+ model->BSIM3v0lgamma2 * Inv_L
+ model->BSIM3v0wgamma2 * Inv_W
+ model->BSIM3v0pgamma2 * Inv_LW;
pParam->BSIM3v0vbx = model->BSIM3v0vbx
+ model->BSIM3v0lvbx * Inv_L
+ model->BSIM3v0wvbx * Inv_W
+ model->BSIM3v0pvbx * Inv_LW;
pParam->BSIM3v0vbm = model->BSIM3v0vbm
+ model->BSIM3v0lvbm * Inv_L
+ model->BSIM3v0wvbm * Inv_W
+ model->BSIM3v0pvbm * Inv_LW;
pParam->BSIM3v0xt = model->BSIM3v0xt
+ model->BSIM3v0lxt * Inv_L
+ model->BSIM3v0wxt * Inv_W
+ model->BSIM3v0pxt * Inv_LW;
pParam->BSIM3v0k1 = model->BSIM3v0k1
+ model->BSIM3v0lk1 * Inv_L
+ model->BSIM3v0wk1 * Inv_W
+ model->BSIM3v0pk1 * Inv_LW;
pParam->BSIM3v0kt1 = model->BSIM3v0kt1
+ model->BSIM3v0lkt1 * Inv_L
+ model->BSIM3v0wkt1 * Inv_W
+ model->BSIM3v0pkt1 * Inv_LW;
pParam->BSIM3v0kt1l = model->BSIM3v0kt1l
+ model->BSIM3v0lkt1l * Inv_L
+ model->BSIM3v0wkt1l * Inv_W
+ model->BSIM3v0pkt1l * Inv_LW;
pParam->BSIM3v0k2 = model->BSIM3v0k2
+ model->BSIM3v0lk2 * Inv_L
+ model->BSIM3v0wk2 * Inv_W
+ model->BSIM3v0pk2 * Inv_LW;
pParam->BSIM3v0kt2 = model->BSIM3v0kt2
+ model->BSIM3v0lkt2 * Inv_L
+ model->BSIM3v0wkt2 * Inv_W
+ model->BSIM3v0pkt2 * Inv_LW;
pParam->BSIM3v0k3 = model->BSIM3v0k3
+ model->BSIM3v0lk3 * Inv_L
+ model->BSIM3v0wk3 * Inv_W
+ model->BSIM3v0pk3 * Inv_LW;
pParam->BSIM3v0k3b = model->BSIM3v0k3b
+ model->BSIM3v0lk3b * Inv_L
+ model->BSIM3v0wk3b * Inv_W
+ model->BSIM3v0pk3b * Inv_LW;
pParam->BSIM3v0w0 = model->BSIM3v0w0
+ model->BSIM3v0lw0 * Inv_L
+ model->BSIM3v0ww0 * Inv_W
+ model->BSIM3v0pw0 * Inv_LW;
pParam->BSIM3v0nlx = model->BSIM3v0nlx
+ model->BSIM3v0lnlx * Inv_L
+ model->BSIM3v0wnlx * Inv_W
+ model->BSIM3v0pnlx * Inv_LW;
pParam->BSIM3v0dvt0 = model->BSIM3v0dvt0
+ model->BSIM3v0ldvt0 * Inv_L
+ model->BSIM3v0wdvt0 * Inv_W
+ model->BSIM3v0pdvt0 * Inv_LW;
pParam->BSIM3v0dvt1 = model->BSIM3v0dvt1
+ model->BSIM3v0ldvt1 * Inv_L
+ model->BSIM3v0wdvt1 * Inv_W
+ model->BSIM3v0pdvt1 * Inv_LW;
pParam->BSIM3v0dvt2 = model->BSIM3v0dvt2
+ model->BSIM3v0ldvt2 * Inv_L
+ model->BSIM3v0wdvt2 * Inv_W
+ model->BSIM3v0pdvt2 * Inv_LW;
pParam->BSIM3v0dvt0w = model->BSIM3v0dvt0w
+ model->BSIM3v0ldvt0w * Inv_L
+ model->BSIM3v0wdvt0w * Inv_W
+ model->BSIM3v0pdvt0w * Inv_LW;
pParam->BSIM3v0dvt1w = model->BSIM3v0dvt1w
+ model->BSIM3v0ldvt1w * Inv_L
+ model->BSIM3v0wdvt1w * Inv_W
+ model->BSIM3v0pdvt1w * Inv_LW;
pParam->BSIM3v0dvt2w = model->BSIM3v0dvt2w
+ model->BSIM3v0ldvt2w * Inv_L
+ model->BSIM3v0wdvt2w * Inv_W
+ model->BSIM3v0pdvt2w * Inv_LW;
pParam->BSIM3v0drout = model->BSIM3v0drout
+ model->BSIM3v0ldrout * Inv_L
+ model->BSIM3v0wdrout * Inv_W
+ model->BSIM3v0pdrout * Inv_LW;
pParam->BSIM3v0dsub = model->BSIM3v0dsub
+ model->BSIM3v0ldsub * Inv_L
+ model->BSIM3v0wdsub * Inv_W
+ model->BSIM3v0pdsub * Inv_LW;
pParam->BSIM3v0vth0 = model->BSIM3v0vth0
+ model->BSIM3v0lvth0 * Inv_L
+ model->BSIM3v0wvth0 * Inv_W
+ model->BSIM3v0pvth0 * Inv_LW;
pParam->BSIM3v0ua = model->BSIM3v0ua
+ model->BSIM3v0lua * Inv_L
+ model->BSIM3v0wua * Inv_W
+ model->BSIM3v0pua * Inv_LW;
pParam->BSIM3v0ua1 = model->BSIM3v0ua1
+ model->BSIM3v0lua1 * Inv_L
+ model->BSIM3v0wua1 * Inv_W
+ model->BSIM3v0pua1 * Inv_LW;
pParam->BSIM3v0ub = model->BSIM3v0ub
+ model->BSIM3v0lub * Inv_L
+ model->BSIM3v0wub * Inv_W
+ model->BSIM3v0pub * Inv_LW;
pParam->BSIM3v0ub1 = model->BSIM3v0ub1
+ model->BSIM3v0lub1 * Inv_L
+ model->BSIM3v0wub1 * Inv_W
+ model->BSIM3v0pub1 * Inv_LW;
pParam->BSIM3v0uc = model->BSIM3v0uc
+ model->BSIM3v0luc * Inv_L
+ model->BSIM3v0wuc * Inv_W
+ model->BSIM3v0puc * Inv_LW;
pParam->BSIM3v0uc1 = model->BSIM3v0uc1
+ model->BSIM3v0luc1 * Inv_L
+ model->BSIM3v0wuc1 * Inv_W
+ model->BSIM3v0puc1 * Inv_LW;
pParam->BSIM3v0u0 = model->BSIM3v0u0
+ model->BSIM3v0lu0 * Inv_L
+ model->BSIM3v0wu0 * Inv_W
+ model->BSIM3v0pu0 * Inv_LW;
pParam->BSIM3v0ute = model->BSIM3v0ute
+ model->BSIM3v0lute * Inv_L
+ model->BSIM3v0wute * Inv_W
+ model->BSIM3v0pute * Inv_LW;
pParam->BSIM3v0voff = model->BSIM3v0voff
+ model->BSIM3v0lvoff * Inv_L
+ model->BSIM3v0wvoff * Inv_W
+ model->BSIM3v0pvoff * Inv_LW;
pParam->BSIM3v0delta = model->BSIM3v0delta
+ model->BSIM3v0ldelta * Inv_L
+ model->BSIM3v0wdelta * Inv_W
+ model->BSIM3v0pdelta * Inv_LW;
pParam->BSIM3v0rdsw = model->BSIM3v0rdsw
+ model->BSIM3v0lrdsw * Inv_L
+ model->BSIM3v0wrdsw * Inv_W
+ model->BSIM3v0prdsw * Inv_LW;
pParam->BSIM3v0prwg = model->BSIM3v0prwg
+ model->BSIM3v0lprwg * Inv_L
+ model->BSIM3v0wprwg * Inv_W
+ model->BSIM3v0pprwg * Inv_LW;
pParam->BSIM3v0prwb = model->BSIM3v0prwb
+ model->BSIM3v0lprwb * Inv_L
+ model->BSIM3v0wprwb * Inv_W
+ model->BSIM3v0pprwb * Inv_LW;
pParam->BSIM3v0prt = model->BSIM3v0prt
+ model->BSIM3v0lprt * Inv_L
+ model->BSIM3v0wprt * Inv_W
+ model->BSIM3v0pprt * Inv_LW;
pParam->BSIM3v0eta0 = model->BSIM3v0eta0
+ model->BSIM3v0leta0 * Inv_L
+ model->BSIM3v0weta0 * Inv_W
+ model->BSIM3v0peta0 * Inv_LW;
pParam->BSIM3v0etab = model->BSIM3v0etab
+ model->BSIM3v0letab * Inv_L
+ model->BSIM3v0wetab * Inv_W
+ model->BSIM3v0petab * Inv_LW;
pParam->BSIM3v0pclm = model->BSIM3v0pclm
+ model->BSIM3v0lpclm * Inv_L
+ model->BSIM3v0wpclm * Inv_W
+ model->BSIM3v0ppclm * Inv_LW;
pParam->BSIM3v0pdibl1 = model->BSIM3v0pdibl1
+ model->BSIM3v0lpdibl1 * Inv_L
+ model->BSIM3v0wpdibl1 * Inv_W
+ model->BSIM3v0ppdibl1 * Inv_LW;
pParam->BSIM3v0pdibl2 = model->BSIM3v0pdibl2
+ model->BSIM3v0lpdibl2 * Inv_L
+ model->BSIM3v0wpdibl2 * Inv_W
+ model->BSIM3v0ppdibl2 * Inv_LW;
pParam->BSIM3v0pdiblb = model->BSIM3v0pdiblb
+ model->BSIM3v0lpdiblb * Inv_L
+ model->BSIM3v0wpdiblb * Inv_W
+ model->BSIM3v0ppdiblb * Inv_LW;
pParam->BSIM3v0pscbe1 = model->BSIM3v0pscbe1
+ model->BSIM3v0lpscbe1 * Inv_L
+ model->BSIM3v0wpscbe1 * Inv_W
+ model->BSIM3v0ppscbe1 * Inv_LW;
pParam->BSIM3v0pscbe2 = model->BSIM3v0pscbe2
+ model->BSIM3v0lpscbe2 * Inv_L
+ model->BSIM3v0wpscbe2 * Inv_W
+ model->BSIM3v0ppscbe2 * Inv_LW;
pParam->BSIM3v0pvag = model->BSIM3v0pvag
+ model->BSIM3v0lpvag * Inv_L
+ model->BSIM3v0wpvag * Inv_W
+ model->BSIM3v0ppvag * Inv_LW;
pParam->BSIM3v0wr = model->BSIM3v0wr
+ model->BSIM3v0lwr * Inv_L
+ model->BSIM3v0wwr * Inv_W
+ model->BSIM3v0pwr * Inv_LW;
pParam->BSIM3v0dwg = model->BSIM3v0dwg
+ model->BSIM3v0ldwg * Inv_L
+ model->BSIM3v0wdwg * Inv_W
+ model->BSIM3v0pdwg * Inv_LW;
pParam->BSIM3v0dwb = model->BSIM3v0dwb
+ model->BSIM3v0ldwb * Inv_L
+ model->BSIM3v0wdwb * Inv_W
+ model->BSIM3v0pdwb * Inv_LW;
pParam->BSIM3v0b0 = model->BSIM3v0b0
+ model->BSIM3v0lb0 * Inv_L
+ model->BSIM3v0wb0 * Inv_W
+ model->BSIM3v0pb0 * Inv_LW;
pParam->BSIM3v0b1 = model->BSIM3v0b1
+ model->BSIM3v0lb1 * Inv_L
+ model->BSIM3v0wb1 * Inv_W
+ model->BSIM3v0pb1 * Inv_LW;
pParam->BSIM3v0alpha0 = model->BSIM3v0alpha0
+ model->BSIM3v0lalpha0 * Inv_L
+ model->BSIM3v0walpha0 * Inv_W
+ model->BSIM3v0palpha0 * Inv_LW;
pParam->BSIM3v0beta0 = model->BSIM3v0beta0
+ model->BSIM3v0lbeta0 * Inv_L
+ model->BSIM3v0wbeta0 * Inv_W
+ model->BSIM3v0pbeta0 * Inv_LW;
/* CV model */
pParam->BSIM3v0elm = model->BSIM3v0elm
+ model->BSIM3v0lelm * Inv_L
+ model->BSIM3v0welm * Inv_W
+ model->BSIM3v0pelm * Inv_LW;
pParam->BSIM3v0cgsl = model->BSIM3v0cgsl
+ model->BSIM3v0lcgsl * Inv_L
+ model->BSIM3v0wcgsl * Inv_W
+ model->BSIM3v0pcgsl * Inv_LW;
pParam->BSIM3v0cgdl = model->BSIM3v0cgdl
+ model->BSIM3v0lcgdl * Inv_L
+ model->BSIM3v0wcgdl * Inv_W
+ model->BSIM3v0pcgdl * Inv_LW;
pParam->BSIM3v0ckappa = model->BSIM3v0ckappa
+ model->BSIM3v0lckappa * Inv_L
+ model->BSIM3v0wckappa * Inv_W
+ model->BSIM3v0pckappa * Inv_LW;
pParam->BSIM3v0cf = model->BSIM3v0cf
+ model->BSIM3v0lcf * Inv_L
+ model->BSIM3v0wcf * Inv_W
+ model->BSIM3v0pcf * Inv_LW;
pParam->BSIM3v0clc = model->BSIM3v0clc
+ model->BSIM3v0lclc * Inv_L
+ model->BSIM3v0wclc * Inv_W
+ model->BSIM3v0pclc * Inv_LW;
pParam->BSIM3v0cle = model->BSIM3v0cle
+ model->BSIM3v0lcle * Inv_L
+ model->BSIM3v0wcle * Inv_W
+ model->BSIM3v0pcle * Inv_LW;
pParam->BSIM3v0abulkCVfactor = 1.0 + pow((pParam->BSIM3v0clc
/ pParam->BSIM3v0leff),
pParam->BSIM3v0cle);
/ pParam->BSIM3v0leff),
pParam->BSIM3v0cle);
pParam->BSIM3v0cgdo = (model->BSIM3v0cgdo + pParam->BSIM3v0cf)
* pParam->BSIM3v0weffCV;
* pParam->BSIM3v0weffCV;
pParam->BSIM3v0cgso = (model->BSIM3v0cgso + pParam->BSIM3v0cf)
* pParam->BSIM3v0weffCV;
* pParam->BSIM3v0weffCV;
pParam->BSIM3v0cgbo = model->BSIM3v0cgbo * pParam->BSIM3v0leffCV;
T0 = (TRatio - 1.0);
pParam->BSIM3v0ua = pParam->BSIM3v0ua + pParam->BSIM3v0ua1 * T0;
pParam->BSIM3v0ub = pParam->BSIM3v0ub + pParam->BSIM3v0ub1 * T0;
pParam->BSIM3v0uc = pParam->BSIM3v0uc + pParam->BSIM3v0uc1 * T0;
T0 = (TRatio - 1.0);
pParam->BSIM3v0ua = pParam->BSIM3v0ua + pParam->BSIM3v0ua1 * T0;
pParam->BSIM3v0ub = pParam->BSIM3v0ub + pParam->BSIM3v0ub1 * T0;
pParam->BSIM3v0uc = pParam->BSIM3v0uc + pParam->BSIM3v0uc1 * T0;
pParam->BSIM3v0u0temp = pParam->BSIM3v0u0
* pow(TRatio, pParam->BSIM3v0ute);
pParam->BSIM3v0vsattemp = pParam->BSIM3v0vsat - pParam->BSIM3v0at
* T0;
pParam->BSIM3v0rds0 = (pParam->BSIM3v0rdsw + pParam->BSIM3v0prt * T0)
* pow(TRatio, pParam->BSIM3v0ute);
pParam->BSIM3v0vsattemp = pParam->BSIM3v0vsat - pParam->BSIM3v0at
* T0;
pParam->BSIM3v0rds0 = (pParam->BSIM3v0rdsw + pParam->BSIM3v0prt * T0)
/ pow(pParam->BSIM3v0weff * 1E6, pParam->BSIM3v0wr);
if (!model->BSIM3v0npeakGiven && model->BSIM3v0gamma1Given)
@ -488,36 +488,36 @@ int Size_Not_Found;
pParam->BSIM3v0npeak = 3.021E22 * T0 * T0;
}
Vtm0 = KboQ * Tnom;
Eg = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0);
ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15)
Vtm0 = KboQ * Tnom;
Eg = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0);
ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15)
* exp(21.5565981 - Eg / (2.0 * Vtm0));
pParam->BSIM3v0phi = 2.0 * Vtm0
* log(pParam->BSIM3v0npeak / ni);
pParam->BSIM3v0phi = 2.0 * Vtm0
* log(pParam->BSIM3v0npeak / ni);
pParam->BSIM3v0sqrtPhi = sqrt(pParam->BSIM3v0phi);
pParam->BSIM3v0phis3 = pParam->BSIM3v0sqrtPhi * pParam->BSIM3v0phi;
pParam->BSIM3v0sqrtPhi = sqrt(pParam->BSIM3v0phi);
pParam->BSIM3v0phis3 = pParam->BSIM3v0sqrtPhi * pParam->BSIM3v0phi;
pParam->BSIM3v0Xdep0 = sqrt(2.0 * EPSSI / (Charge_q
* pParam->BSIM3v0npeak * 1.0e6))
* pParam->BSIM3v0sqrtPhi;
* pParam->BSIM3v0npeak * 1.0e6))
* pParam->BSIM3v0sqrtPhi;
pParam->BSIM3v0sqrtXdep0 = sqrt(pParam->BSIM3v0Xdep0);
pParam->BSIM3v0litl = sqrt(3.0 * pParam->BSIM3v0xj
* model->BSIM3v0tox);
* model->BSIM3v0tox);
pParam->BSIM3v0vbi = Vtm0 * log(1.0e20
* pParam->BSIM3v0npeak / (ni * ni));
* pParam->BSIM3v0npeak / (ni * ni));
pParam->BSIM3v0cdep0 = sqrt(Charge_q * EPSSI
* pParam->BSIM3v0npeak * 1.0e6 / 2.0
/ pParam->BSIM3v0phi);
* pParam->BSIM3v0npeak * 1.0e6 / 2.0
/ pParam->BSIM3v0phi);
if (model->BSIM3v0k1Given || model->BSIM3v0k2Given)
{ if (!model->BSIM3v0k1Given)
{ fprintf(stdout, "Warning: k1 should be specified with k2.\n");
{ if (!model->BSIM3v0k1Given)
{ fprintf(stdout, "Warning: k1 should be specified with k2.\n");
pParam->BSIM3v0k1 = 0.53;
}
if (!model->BSIM3v0k2Given)
{ fprintf(stdout, "Warning: k2 should be specified with k1.\n");
{ fprintf(stdout, "Warning: k2 should be specified with k1.\n");
pParam->BSIM3v0k2 = -0.0186;
}
if (model->BSIM3v0nsubGiven)
@ -534,87 +534,87 @@ int Size_Not_Found;
fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n");
}
else
{ if (!model->BSIM3v0vbxGiven)
pParam->BSIM3v0vbx = pParam->BSIM3v0phi - 7.7348e-4
{ if (!model->BSIM3v0vbxGiven)
pParam->BSIM3v0vbx = pParam->BSIM3v0phi - 7.7348e-4
* pParam->BSIM3v0npeak
* pParam->BSIM3v0xt * pParam->BSIM3v0xt;
if (pParam->BSIM3v0vbx > 0.0)
pParam->BSIM3v0vbx = -pParam->BSIM3v0vbx;
if (pParam->BSIM3v0vbm > 0.0)
* pParam->BSIM3v0xt * pParam->BSIM3v0xt;
if (pParam->BSIM3v0vbx > 0.0)
pParam->BSIM3v0vbx = -pParam->BSIM3v0vbx;
if (pParam->BSIM3v0vbm > 0.0)
pParam->BSIM3v0vbm = -pParam->BSIM3v0vbm;
if (!model->BSIM3v0gamma1Given)
pParam->BSIM3v0gamma1 = 5.753e-12
* sqrt(pParam->BSIM3v0npeak)
* sqrt(pParam->BSIM3v0npeak)
/ model->BSIM3v0cox;
if (!model->BSIM3v0gamma2Given)
pParam->BSIM3v0gamma2 = 5.753e-12
* sqrt(pParam->BSIM3v0nsub)
* sqrt(pParam->BSIM3v0nsub)
/ model->BSIM3v0cox;
T0 = pParam->BSIM3v0gamma1 - pParam->BSIM3v0gamma2;
T1 = sqrt(pParam->BSIM3v0phi - pParam->BSIM3v0vbx)
- pParam->BSIM3v0sqrtPhi;
- pParam->BSIM3v0sqrtPhi;
T2 = sqrt(pParam->BSIM3v0phi * (pParam->BSIM3v0phi
- pParam->BSIM3v0vbm)) - pParam->BSIM3v0phi;
- pParam->BSIM3v0vbm)) - pParam->BSIM3v0phi;
pParam->BSIM3v0k2 = T0 * T1 / (2.0 * T2 + pParam->BSIM3v0vbm);
pParam->BSIM3v0k1 = pParam->BSIM3v0gamma2 - 2.0
* pParam->BSIM3v0k2 * sqrt(pParam->BSIM3v0phi
- pParam->BSIM3v0vbm);
* pParam->BSIM3v0k2 * sqrt(pParam->BSIM3v0phi
- pParam->BSIM3v0vbm);
}
if (pParam->BSIM3v0k2 > 0.0)
{ T0 = 0.5 * pParam->BSIM3v0k1 / pParam->BSIM3v0k2;
if (pParam->BSIM3v0k2 > 0.0)
{ T0 = 0.5 * pParam->BSIM3v0k1 / pParam->BSIM3v0k2;
pParam->BSIM3v0vbsc = 0.9 * (pParam->BSIM3v0phi - T0 * T0);
if (pParam->BSIM3v0vbsc > -3.0)
pParam->BSIM3v0vbsc = -3.0;
else if (pParam->BSIM3v0vbsc < -30.0)
pParam->BSIM3v0vbsc = -30.0;
}
else
{ pParam->BSIM3v0vbsc = -10.0;
}
model->BSIM3v0vtm = KboQ * Temp;
if (model->BSIM3v0vth0Given)
pParam->BSIM3v0vfb = model->BSIM3v0type * pParam->BSIM3v0vth0
- pParam->BSIM3v0phi - pParam->BSIM3v0k1
if (pParam->BSIM3v0vbsc > -3.0)
pParam->BSIM3v0vbsc = -3.0;
else if (pParam->BSIM3v0vbsc < -30.0)
pParam->BSIM3v0vbsc = -30.0;
}
else
{ pParam->BSIM3v0vbsc = -10.0;
}
model->BSIM3v0vtm = KboQ * Temp;
if (model->BSIM3v0vth0Given)
pParam->BSIM3v0vfb = model->BSIM3v0type * pParam->BSIM3v0vth0
- pParam->BSIM3v0phi - pParam->BSIM3v0k1
* pParam->BSIM3v0sqrtPhi;
else
pParam->BSIM3v0vth0 = model->BSIM3v0type * (-1.0
+ pParam->BSIM3v0phi + pParam->BSIM3v0k1
+ pParam->BSIM3v0phi + pParam->BSIM3v0k1
* pParam->BSIM3v0sqrtPhi);
T1 = sqrt(EPSSI / EPSOX * model->BSIM3v0tox
* pParam->BSIM3v0Xdep0);
* pParam->BSIM3v0Xdep0);
T0 = exp(-0.5 * pParam->BSIM3v0dsub * pParam->BSIM3v0leff / T1);
pParam->BSIM3v0theta0vb0 = (T0 + 2.0 * T0 * T0);
T0 = exp(-0.5 * pParam->BSIM3v0drout * pParam->BSIM3v0leff / T1);
T2 = (T0 + 2.0 * T0 * T0);
pParam->BSIM3v0thetaRout = pParam->BSIM3v0pdibl1 * T2
+ pParam->BSIM3v0pdibl2;
+ pParam->BSIM3v0pdibl2;
/* process source/drain series resistance */
here->BSIM3v0drainConductance = model->BSIM3v0sheetResistance
* here->BSIM3v0drainSquares;
here->BSIM3v0drainConductance = model->BSIM3v0sheetResistance
* here->BSIM3v0drainSquares;
if (here->BSIM3v0drainConductance > 0.0)
here->BSIM3v0drainConductance = 1.0
/ here->BSIM3v0drainConductance;
else
/ here->BSIM3v0drainConductance;
else
here->BSIM3v0drainConductance = 0.0;
here->BSIM3v0sourceConductance = model->BSIM3v0sheetResistance
* here->BSIM3v0sourceSquares;
if (here->BSIM3v0sourceConductance > 0.0)
here->BSIM3v0sourceConductance = model->BSIM3v0sheetResistance
* here->BSIM3v0sourceSquares;
if (here->BSIM3v0sourceConductance > 0.0)
here->BSIM3v0sourceConductance = 1.0
/ here->BSIM3v0sourceConductance;
else
/ here->BSIM3v0sourceConductance;
else
here->BSIM3v0sourceConductance = 0.0;
}
here->BSIM3v0cgso = pParam->BSIM3v0cgso;
here->BSIM3v0cgdo = pParam->BSIM3v0cgdo;
}
here->BSIM3v0cgso = pParam->BSIM3v0cgso;
here->BSIM3v0cgdo = pParam->BSIM3v0cgdo;
}
}
return(OK);

926
src/spicelib/devices/bsim3v1/b3v1temp.c
File diff suppressed because it is too large
View File

12
src/spicelib/devices/bsim4/b4temp.c
View File

@ -1393,7 +1393,7 @@ int Size_Not_Found, i;
pParam->BSIM4Bechvb = (model->BSIM4type == NMOS) ? 7.45669e11 : 1.16645e12;
if ((strcmp(model->BSIM4version, "4.8.1")) && (strncmp(model->BSIM4version, "4.81", 4)))
{
{
pParam->BSIM4AechvbEdgeS = pParam->BSIM4Aechvb * pParam->BSIM4weff
* model->BSIM4dlcig * pParam->BSIM4ToxRatioEdge;
pParam->BSIM4AechvbEdgeD = pParam->BSIM4Aechvb * pParam->BSIM4weff
@ -1626,7 +1626,7 @@ int Size_Not_Found, i;
/*high k*/
/*Calculate VgsteffVth for mobMod=3*/
if(model->BSIM4mobMod==3)
{ /*Calculate n @ Vbs=Vds=0*/
{ /*Calculate n @ Vbs=Vds=0*/
lt1 = model->BSIM4factor1* pParam->BSIM4sqrtXdep0;
T0 = pParam->BSIM4dvt1 * pParam->BSIM4leff / lt1;
if (T0 < EXP_THRESHOLD)
@ -1877,14 +1877,14 @@ int Size_Not_Found, i;
}
/*rbpbx = exp( log(model->BSIM4rbpbx0) + model->BSIM4rbpbxl * lnl +
model->BSIM4rbpbxw * lnw + model->BSIM4rbpbxnf * lnnf );
model->BSIM4rbpbxw * lnw + model->BSIM4rbpbxnf * lnnf );
rbpby = exp( log(model->BSIM4rbpby0) + model->BSIM4rbpbyl * lnl +
model->BSIM4rbpbyw * lnw + model->BSIM4rbpbynf * lnnf );
model->BSIM4rbpbyw * lnw + model->BSIM4rbpbynf * lnnf );
*/
rbpbx = model->BSIM4rbpbx0 * exp( model->BSIM4rbpbxl * lnl +
model->BSIM4rbpbxw * lnw + model->BSIM4rbpbxnf * lnnf );
model->BSIM4rbpbxw * lnw + model->BSIM4rbpbxnf * lnnf );
rbpby = model->BSIM4rbpby0 * exp( model->BSIM4rbpbyl * lnl +
model->BSIM4rbpbyw * lnw + model->BSIM4rbpbynf * lnnf );
model->BSIM4rbpbyw * lnw + model->BSIM4rbpbynf * lnnf );
here->BSIM4rbpb = rbpbx*rbpby/(rbpbx + rbpby);
}

1440
src/spicelib/devices/bsim4v5/b4v5temp.c
File diff suppressed because it is too large
View File

2012
src/spicelib/devices/bsim4v6/b4v6temp.c
File diff suppressed because it is too large
View File

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